enable / disable ART accelerator

[troy1818]

Posted on September 19, 2013 at 11:43

Simple question. Hard to find any information about this.

In the data sheet there are tables where ART is disabled and where it is enabled. But no more information at all around the ART concept. Regards, rygelxvi

[Tesla DeLorean]

Posted on September 19, 2013 at 12:23

Actually the

http://www.st.com/st-web-ui/static/active/en/resource/technical/document/reference_manual/DM00031020.pdf

(Pg 82, Rev 5) is where you'd want to start, then perhaps some of the

http://www.st.com/web/en/resource/sales_and_marketing/presentation/product_presentation/stm32f4_marketing_pres.pdf

(Pg 5). The salient information is that it is a cache of 128-bit FLASH lines (ie ~35 ns gets you 16-bytes), ART masks this by providing the prefetch path of the processor with word hits on the cache, and trying to reduce misses by preemptively grabbing subsequent lines. The cache holds 64x 128-bit flash lines, presumably in a 16x 4-way arrangement. Not sure the exact structure is important, it is rather effective at masking the intrinsic slowness of FLASH. In fact it would appear that it can deliver data to the prefetch path faster than a read from SRAM would.

[troy1818]

Posted on September 19, 2013 at 13:30

Thanks clive for answer. I have read the reference manual.

Does anyone know if this ART feature is enabled by default, or do I need to do something to enable it? Is ART same as prefetch? Regards, rygelxvi

[waclawek.jan]

Posted on September 19, 2013 at 13:43

> Does anyone know if this ART feature is enabled by default, or do I need to do something to enable it?

If you've read the manual, you've surely stumbled upon the FLASH_ACR register, and its description, containing also its reset values. > Is ART same as prefetch? As the user manual - which you've read - writes, ART consists of instruction prefetch, instruction cache, and data cache. JW

[troy1818]

Posted on September 19, 2013 at 13:45

Im sorry if Im being a little stupid here, but I have a lot to learn when it comes to HW and MCUs.

Basically I want to get as much cream as I possible can with my stm32f407 MCU. I do not care about power consumption, My code is basically an emulator that emulates a number of old HW ASICs with a lot of internal memory access and a lot of branching. It is using FSMC and DMA towards screen memory and also towards NAND memory. I seen performance increase when activating prefetch. Storing key functions in RAM does not help me increase performance further. I am running at about 210Mhz. But I would be happy if I could get even more juce :D Regards, rygelxvi

[Tesla DeLorean]

Posted on September 19, 2013 at 13:52

At 210 MHz you're totally outside the specs, the ART/prefetch is probably a critical path (was on the F2)

From system_stm32f4xx.c, SystemInit()     /* Configure Flash prefetch, Instruction cache, Data cache and wait state */     FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;

[troy1818]

Posted on September 19, 2013 at 15:23

Yes, speed is however essential for my application and I found that I really enjoy playing around with this ucontroller.

I actually use this today: FLASH->ACR = FLASH_ACR_PRFTEN |FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS; I guess the only differance is that I have prefetch activated (FLASH_ACR_PRFTEN). Runs pretty stable at my breadboard at that speed. Without using FSMC even higher speed (250Mhz) is ''stable'', but I do not know for how long the mcu can mange before permanent damage :) Regards, rygelxvi