Associate II

Question

driverchip for GPIO support

Forum|Forum|2 years ago
October 26, 2023
6 replies
2082 views

Hello forum,

I need some hardware help to modify my PCB, which was developed by other people.

I use STM32F103. I have one "Master"-Board and several "Slave"-Boards (up to 20) with same controller.

Because of current saving reasons I need to set the controllers to sleep (to me more clear, to Stop Mode) for most of the time, which is working fine.

To wake up the slaves I have a wake-up-Signal line from one GPIO at the Masterboard (PB0) to all of the wake-up-Pins (PA0) of the Slaves like a daisy chain.

But after a while PB0 of the Mater crashes and I am not able any more to generate a high level signal. I already tried with 1k resistors in line to limit current flow but it does not help (enough).

I guess I need some kind of driver. Would something like 74LVC2G17GV-Q100H work? Or do you have any other suggestions (or questions)?

Thank you very much!

Protection and signal conditioning

This topic has been closed for replies.

TDK

> But after a while PB0 of the Mater crashes and I am not able any more to generate a high level signal. I already tried with 1k resistors in line to limit current flow but it does not help (enough).

Suggests the slaves are pulling down PA0. Perhaps one is not powered, or not powered enough.

I'd map out how much current is required and make sure you're only pulling a few mA at most. The pulldowns on the slaves on this line should be weak--internal pulldown is around 40 kΩ. But even with 20 of those, the current requirement is minimal.

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APlöt.1Author

Associate II

Thanks for your answer.

After the PB0 pin gets damaged, I cannot even put it in high level state without any slaves connected. So just measuring with Oszi (or multimeter) directly at the not connected pin. That is what suggests me, that the pin is "broken" and not any slaves pulldowns are the reason.

Actually and in addition, I don't have configured the slave inputs with any pull-up or pull-downs. Would that be better? The PA0 input is configured as external interrupt with rising edge trigger detection

TDK

Agree with everything JW says below.

It could be a counterfeit chip that has sub-par performance and just wore out. I would guess there was a high-voltage event that damaged it though. If slaves aren't pulling the line down, the STM32 should be more than capable of controlling it.

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waclawek.jan

Super User

> I use STM32F103

Which one? Isn't it a blue-pill?

> after a while PB0 of the Mater crashes

What does it mean, exactly?

What happens after reset?

Read out and post relevant GPIO/AFIO registers content before and after "crash".

JW

APlöt.1Author

Associate II

Thank you for you questions.

It is STM32F103C8T6, could be bluepill, I am not sure.

With "crash" I mean permanently damaged. As I wrote also in the above reply, I am not able to put the pin in High Level state, not with slaves connected and also not without slaves. Reset does not help in any way.

So I guess I need any support for driving the PB0 line. Similar to a SPI driver chip or something. To relieve the current stress to the master pin.

For perhaps better understanding, I tried to sketch my connection (just for 4 slaves, not 20 for better visuality).

waclawek.jan

Super User

Permanent damage sounds worrying and I don't believe it could've originated from overload alone (in my experience, STM32 pins often survive shorts to ground); so there might've been an unexpected excessive voltage level on that line, for whatever reason (often ground failure is involved), so you may want to investigate in that direction. The CAN drivers are usually quite sturdy. The buffer you've suggested may be OK, at least it will be the one which takes the damage...

JW

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