2015-10-19 02:01 AM
Hello,
In one of our projects we have implemented IWDG (independant watchdog). There is a condition in the software that when the power supply fails, the controller STM32F103(Powered By Rechargeable Battery) puts itself in deep power down mode. In the power down mode the IWDG resets the controller. I do not want this to happen. In power down the watchdog should not reset the controller.What can be the solution for this?Thanks #stm32-watchdog-system-reset2015-10-19 02:41 AM
According to the reference manual, once the IWDG is started it cannot be stopped except by a Reset.
You could intentionally cause a Reset, and on starting from reset have a test that checks if the power supply has failed. If so it just goes into deep sleep rather than starting execution normally.Hope this helps,Danish2015-10-19 03:09 AM
To state it differently, the concept of watchdogs is incompatible with power-down.
Write a signature to RAM, let the IWDG reset happen, and then go from reset to power-down without initializing the IWDG if this signature is present.2016-12-15 01:24 PM
No, IWDG can be made compatible with STOP mode. Per the STM manuals there is something called the IWDG_STOP bit in the FLASH_OPTR register, which (if set) freezes the IWDG during stop. I'm actually digging through the forum looking for more explanation of what this means!
2017-10-27 07:46 AM
This is bugging me, too. My best solution at present (on the STM32L100 series*) is to set the IWDG to as long a timeout as possible, drop to lowest possible clock rate. and have the RTC periodic timer event wake up the processor once in a blue moon from a Standby WFE, just to kick the dog and go back to sleep. This should use so little power so rarely that it's as good as noise in the overall consumption.
(* which don't have an IWDG_STOP bit, except DBG_IWDG_STOP, which appears to apply solely to the debugger)