cancel
Showing results for 
Search instead for 
Did you mean: 

Controller resets when enabling interrupt

timon1994
Associate II
Posted on June 26, 2012 at 12:33

controller resets when I enable timer interrupt with the period about half second.

watchdog is ok.

timer config:

TIM_TimeBaseInitTypeDef  TIM_TimeBaseStructure;

RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM6, ENABLE);

TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);

TIM_TimeBaseStructure.TIM_Period = 10000;

TIM_TimeBaseStructure.TIM_Prescaler = 16800-1;

TIM_TimeBaseInit(TIM6, &TIM_TimeBaseStructure);

TIM_ITConfig(TIM6, TIM_IT_Update, ENABLE);

TIM_Cmd(TIM6, ENABLE);

enabling interrupt:

NVIC_EnableIRQ(TIM6_DAC_IRQn);

also I've tried to enable interrupt this way:

NVIC_InitTypeDef NVIC_InitStructure;

NVIC_InitStructure.NVIC_IRQChannel = TIM6_DAC_IRQn;

NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;

NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;

NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;

NVIC_Init(&NVIC_InitStructure);

interrupt handler:

void TIM6_DAC_IRQnHandler() {

   if (TIM_GetITStatus(TIM6, TIM_IT_Update) != RESET) {

      TIM_ClearITPendingBit(TIM6, TIM_IT_Update);

      IWDG_ReloadCounter();

   }

}

what can I do?

thanks in advance.
2 REPLIES 2
frankmeyer9
Associate II
Posted on June 26, 2012 at 14:41

what can I do?

 

Attach a debugger, and see what actually happens.

Read out the RCC_CSR register, it should tell you what did reset the uC, if at all.

Posted on June 26, 2012 at 15:02

The interrupt handlers must match the names specified in the vector table so instead of

void TIM6_DAC_IRQnHandler() {

...

use

void TIM6_DAC_IRQHandler() {

...

Confirm you are using the correct startup_stm32f1xx_xx_xx.s file for your specific part.
Tips, Buy me a coffee, or three.. PayPal Venmo
Up vote any posts that you find helpful, it shows what's working..