Hi everyone,
I’m working with the STM32C011D6 in the SO8N package, and I’m a bit confused by the pinout and remapping notations in the datasheet.
In the alternate function table, PA11 [PA9] and PA12 [PA10] are shown for pins 5 and 6 respectively. From what I understand, this suggests that PA11 and PA12 might internally perform the functions of PA9 and PA10 in packages where PA9 and PA10 are not present.
In fact, the datasheet itself notes that no package implements PA9 and PA10, which further leads me to assume that PA11 and PA12 are intended to handle those alternate functions (like I2C1_SCL and I2C1_SDA) in reduced pin-count packages like SO8N.
However, I’m running into some uncertainty:
Do pins 5 and 6 of the SO8N package actually support I2C1 (SCL/SDA) functionality?
In STM32CubeMX, I don’t see any option to configure I2C on those pins for the SO8N package — is this a limitation, or is there a specific way to enable this functionality?
How should I properly interpret the [PA9] notation next to PA11 in this context? Is it automatic remapping, or something that must be configured?
Any clarification would be really appreciated. If someone from ST or anyone who's used this package before could weigh in, that would be super helpful!
Thanks in advance!
I’ve attached the screenshot from the datasheet that I’m referencing for clarity.
Thanks for the explanation — that makes a lot of sense, and it aligns with how I was starting to interpret it.
That said, I’d like to be 100% certain about this specific behavior before relying on it in my design, especially since CubeMX doesn’t show I2C as an option on pin 5 (PA9) in this package. If anyone has official confirmation from ST or has tested this exact configuration (e.g., using PA11 as a remapped PA9 for I2C or USART in SO8N), I’d really appreciate the reassurance.
Just want to be sure I’m not misinterpreting the datasheet or overlooking any limitations.
Thanks again!
