Conflict in the definition of VTOR register

[ELevy.1873]

Hi.

In PM0214 programming manual page 40 it says:

On system reset, the vector table is fixed at address 0x00000000. Privileged software can write to the VTOR to relocate the vector table start address to a different memory location, in the range 0x00000080 to 0x3FFFFF80.

So I can understand that bits 0-6 and bits 30-31 are reserved, and the other bits can be programmed.

On page 227 it says:

Bits 31:30 Reserved, must be kept cleared

Bits 29:9 TBLOFF: Vector table base offset field. It contains bits [29:9] of the offset of the table base from memory address 0x00000000. When setting TBLOFF, you must align the offset to the number of exception entries in the vector table. The minimum alignment is 128 words. Table alignment requirements mean that bits[8:0] of the table offset are always zero.

So I can understand that bits 7-8 are also reserved.

And in the STM32CubeIDE I can see that bits 7-8 can be programmed as it wrote on page 40, but also bits 30-31 can be programmed.

Three sources with 3 different definitions!

What is the true definition?

Thanks.

[ELevy.1873]

I wanted to add that picture, but It's not added earlier.

[Tesla DeLorean]

The low order bit count is implementation specific. Basically aligned to the next power of two beyond the vectors allocated to the NVIC.

In many STM32 this means the alignment is typically 512-bytes

So depends on how the Cortex-Mx core compiles..

[TDK]

There's no real conflict on bits 31:30 since bits which are reserved as 0 and bits which are writeable but only as 0 are effectively equivalent. Upper two bits on the max value of 0x3FFFFF80 are zero.

[ELevy.1873]

Thanks.

But strange that they seem to determine reality and not say it depends on something.

[ELevy.1873]

Thanks.

It seemed to me that way about the IDE, but I preferred to be sure of it.