Configuring STM32F439 timer to pulse at specific counts.

[EBDRS]

I wanted to use the STM32F439 timers, any of them but timer 8 seems to be the best one with my current peripherals, to act as a trigger source. Basically, the timer would drive a pin low, and at specific counts of the timer, drive the pin high for ~50ns, then reset low. The counts that change the output would be software defined. The trigger would also be software defined. An external oscillator is used to ensure accuracy. The load should only be about 10 pF and 5.5 uA.

Would it be better to bit-bang the output with internal timers instead?

[Michal Dudka · Accepted solution]

It is "pulse box".  Importatnt question is what is acceptable minimum gap between pulses ? If about 20 clock ticks (130ns) then it can be done by timer in PWM mode with reconfiguration its periody by DMA. If gap must be shorter, then you will not be able to reconfigure timer "in time" and you have to go harder way.

With SPI you are able to create any pattern with your clock granularity (6.6ns), but in some cases you need to be clever, especialy in case of high number of pulses and long pulse patterns. You have limited memory space and in "brute force" SPI mode you need 1bit for every clock cycle. 22000 cycles long gap takes 2.75kB of RAM and in case of high number of pulses you can run out of memory. In that case you have to choose clever method. Use CPU to interpret data and load them into SPI manualy. Few years back one our student do something similar on FPGA (with 1ns resolution) but his used principle can be done even on MCU. 

BTW: If you need more resolution you can choose STM with HRtimer and you will get resolution up to 0.3ns

Be please little more specific... how many pulses ? And minimal needed gap ?

[EBDRS]

SPI appears to be the easiest option.

The minimal gap between pulses is 20 clock ticks. The 22000 cycles is how long the entire thing will be, from the start of sending pulses to the end. The SPI method would essentially just be an array of about 750 chars, so 750 bytes. The SPI max frequency is half the APB's frequency; the APB's frequency is maxed out at either 90 or 45 MHz depending on which one I use, which is half or 1/4th the CPU max speed. With my CPU at 149.855 MHz, the SPI speed would be 1/4th that, and each char is 8 clock cycles, so 750 chars. The chars would all be nulls except for when there's a pulse, in which case, 1 or 2 bits in the char would be 1, to give a 8 clock cycle wide pulse.

The end user would set in a few numbers of when to pulse high, using an external program; with PWM, I would have to calculate the appropriate lows and highs for every pulse, while with the SPI method, I could just send a command to the MCU with the ranges and it will generate an array, or send the command with the array itself, with the chars that would generate the appropriate pulses.