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Configure channel3 Timer2

gfoujanet
Associate II
Posted on September 10, 2013 at 16:45

Hi,

For the moment I am using the channel2 of the Timer 2 in capture mode. At each rising edge of the signal, the timer is captured and reseted; It works fine; My code is this following:


GPIO_InitTypeDef GPIO_InitStructure;

/* GPIOC Periph clock enable */

RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);


/* Configure PB10 in input*/

GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3 ;

GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;

GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;

GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz;

GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN;

GPIO_Init(GPIOB, &GPIO_InitStructure);


GPIO_PinAFConfig(GPIOB, GPIO_PinSource3, GPIO_AF_TIM2);


/* Enable the TIM2 global Interrupt */

//configure NVIC

//select NVIC channel to configure

NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;

//set priority to highest

NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0;

//set sub-priority to highest

NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0;

//enable IRQ channel

NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;

//update NVIC registers

NVIC_Init(&NVIC_InitStructure);

// Timerx Periph clock enable

RCC_APB1PeriphClockCmd( SYNCH_TIMER_CLK, ENABLE );

// Configures the Timerx internal Clock

TIM_InternalClockConfig ( SYNCH_TIMER_BASE );


TIM_DeInit( SYNCH_TIMER_BASE );

TIM_TimeBaseStructInit( &TIM_TimeBaseStructure );

TIM_TimeBaseStructure.TIM_Prescaler = TIM_ICPSC_DIV1;

TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;

TIM_TimeBaseStructure.TIM_Period = 0xFFFF;

TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;

// Initializes the Timerx Time Base Unit peripheral

TIM_TimeBaseInit( SYNCH_TIMER_BASE, &TIM_TimeBaseStructure );


TIM_ICInitStructure.TIM_Channel = TIM_Channel_2;

TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Rising;

TIM_ICInitStructure.TIM_ICSelection = TIM_ICSelection_DirectTI;

TIM_ICInitStructure.TIM_ICPrescaler = TIM_ICPSC_DIV1;

TIM_ICInitStructure.TIM_ICFilter = 0x0;

TIM_ICInit(SYNCH_TIMER_BASE, &TIM_ICInitStructure);


TIM_SelectSlaveMode(SYNCH_TIMER_BASE , TIM_SlaveMode_Reset);

//

// SYNCH_TIMER_BASE->SMCR |= 0x04; /* timer in reset mode */

// SYNCH_TIMER_BASE->SMCR |= 0x70;

// SYNCH_TIMER_BASE->SMCR |= 0x80;

// TIM_SelectMasterSlaveMode(SYNCH_TIMER_BASE , TIM_MasterSlaveMode_Enable);

//


/* TIM enable counter */

TIM_Cmd(SYNCH_TIMER_BASE, ENABLE);


/* DISABLE the CC2 Interrupt Request */

TIM_ITConfig(SYNCH_TIMER_BASE, TIM_IT_CC2, ENABLE);

Now I would like to use the channel 3 , so My configuration is this following:


GPIO_InitTypeDef GPIO_InitStructure;

/* GPIOC Periph clock enable */

RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);


/* Configure PB10 in input*/

GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10 ;

GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;

GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;

GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz;

GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN;

GPIO_Init(GPIOB, &GPIO_InitStructure);


GPIO_PinAFConfig(GPIOB, GPIO_PinSource10, GPIO_AF_TIM2);


/* Enable the TIM2 global Interrupt */

//configure NVIC

//select NVIC channel to configure

NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;

//set priority to highest

NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0;

//set sub-priority to highest

NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0;

//enable IRQ channel

NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;

//update NVIC registers

NVIC_Init(&NVIC_InitStructure);



// Timerx Periph clock enable

RCC_APB1PeriphClockCmd( SYNCH_TIMER_CLK, ENABLE );

// Configures the Timerx internal Clock

TIM_InternalClockConfig ( SYNCH_TIMER_BASE );



TIM_DeInit( SYNCH_TIMER_BASE );

TIM_TimeBaseStructInit( &TIM_TimeBaseStructure );

TIM_TimeBaseStructure.TIM_Prescaler = TIM_ICPSC_DIV1;

TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;

TIM_TimeBaseStructure.TIM_Period = 0xFFFF;

TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;

// Initializes the Timerx Time Base Unit peripheral

TIM_TimeBaseInit( SYNCH_TIMER_BASE, &TIM_TimeBaseStructure );


/*TIMx_CCR3 must be linked to the TI3 input*/

SYNCH_TIMER_BASE->CCMR2 |= 0x01; 
/* CC3S = 01 :: IC3 is mapped on TI3 */


TIM_ICInitStructure.TIM_Channel = TIM_Channel_3;

TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Rising;

TIM_ICInitStructure.TIM_ICSelection = TIM_ICSelection_DirectTI;

TIM_ICInitStructure.TIM_ICPrescaler = TIM_ICPSC_DIV1;

TIM_ICInitStructure.TIM_ICFilter = 0x0;

TIM_ICInit(SYNCH_TIMER_BASE, &TIM_ICInitStructure);


TIM_SelectSlaveMode(SYNCH_TIMER_BASE , TIM_SlaveMode_Reset);


/* TIM enable counter */

TIM_Cmd(SYNCH_TIMER_BASE, ENABLE);


/* DISABLE the CC3 Interrupt Request */

TIM_ITConfig(SYNCH_TIMER_BASE, TIM_IT_CC3, ENABLE);

but with the channel 3, the reset mode doesn't work. I don't understand why. Is it possible to do the same thing with channels 1/2 and channels 3/4 ? Thank you very much, GF. #timer2-channel
2 REPLIES 2
Posted on September 10, 2013 at 17:27

You can't trigger a TIM from TI3 or TI4. You can push CH3 via the XOR to TI1

If you take CCRx measurements, captured via DMA for fast frequencies, you can compute a delta rather than reset.

Note to All : When posting code try to post something that is sufficiently complete and free-standing that it compiles, and I don't have to guess/search what STM32 part you're using, or what the defines are.
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gfoujanet
Associate II
Posted on September 11, 2013 at 11:16

Hi,

I configured the timer 2 with the XOR gate (bit7 of CR2)

The problem is that all flags CC1F/CC2F/CC3F and CC4F are pending when there is an interrupt due of a capture.

I expected that just CC1F.  And I don't understand why CC4F is pending also.

But just the capture register 1 is update: that is ok.

Anybody has already used the XOr gate in Timers?

Did you have expected results?

Thanks,

GF.