CMSIS STM32F4 setting AFR register

[Mark Higham]

Posted on June 04, 2017 at 04:37

There doesn't seem to be any bit definition for the GPIO AFR registers. I can set the PA5 pin alternate function to AF1 using the below code but other registers seems to have bit definitions to use. Am I missing them?

GPIOA->AFR[0] |= 0x00100000;

[Tesla DeLorean]

Posted on June 04, 2017 at 23:56

Each pin has a 4-bit mux value, so 4x16 = 64-bits, spread over two 32-bit AFR words

The mux table is in the Data Sheet, see pin table with pins down the side, and AF value across the top.