Check of ADC-EOC Flag

michaellange9 · ‎2008-07-29

Posted on July 30, 2008 at 06:55

michaellange9 · ‎2011-05-17

Posted on May 17, 2011 at 12:40

Hi,

I'd like to wait until the end of an AD-conversion before I read out the data-register. But the EOC-flag is not set?!?

My configuration is:

{

ADC1->SQR1 &= ~0x00F00000; // only one conversion, clear L-Bits

/* sampletime 7.5 cycle for CH14 */

ClrBit(ADC1->SMPR1,14);

ClrBit(ADC1->SMPR1,13);

SetBit(ADC1->SMPR1,12);

ADC1->SQR3 = 0x0000000E; //set CH4 for first conversion

ADC1->CR1 = 0x00000000; //control configuration

ADC1->CR2 |= 0x000E0000; //triggered by software

SetBit(ADC1->CR2,0); //Set ADON to enable ADC

SetBit(ADC1->CR2,22); //Set SWS to start conversion

while(!CheckBit(ADC1->SR,1)); //Check EOC-flag and wait until conversion is complete

return(ADC1->DR)

}

When I uncomment the ''while...'' line it works fine... Otherwise the programm stops here.

What is wrong?

Michael

16-32micros · ‎2011-05-17

Posted on May 17, 2011 at 12:40

Hi,

I believe that this coming from the set of ADON bit sequence where the software has to wait a stabilization time before triggering other conversions.

I found on RM0008 this description :

Bit 0 ADON: A/D Converter ON / OFF

This bit is set and cleared by software. If this bit holds a value of zero and a 1 is written to it then it wakes up the ADC from Power Down state.

Conversion starts when this bit holds a value of 1 and a 1 is written to it. The application should allow a delay of tSTAB between power up and start of conversion. Refer to Figure 22.

0: Disable ADC conversion/calibration and go to power down mode.

1: Enable ADC and to start conversion

Note: If any other bit in this register apart from ADON is changed at the same time, then conversion is not triggered. This is to prevent triggering an erroneous conversion.

I suggest you to add a delay between :

SetBit(ADC1->CR2,0); //Set ADON to enable ADC

delay (time);

SetBit(ADC1->CR2,22); //Set SWS to start conversion

And check if it is working. Note that reading the DR in the next instruction will automatically clear the EOC bit.

Cheers,

STOne-32.

michaellange9 · ‎2011-05-17

Posted on May 17, 2011 at 12:40

Hello,

thanks for your suggestion!

You are right. It is due to setting the ADON-Bit the right way. In my previose ADC-calibration routine I cleared the ADON-Bit at the end, so the ADC fell to sleep again and I have to set the ADON-Bit to times for the next conversion.

I left to set the SWS-Bit because when I set the ADON-Bit the second time (when the ADC is powered up) a conversion is triggered. So do I need to set the SWS-Bits in this application?

Cheers and thank you for your support!