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Cannot Connect to STM32F405RGT6 on Breakout (ST-Link V2)

honboxuan
Associate II
Posted on December 25, 2012 at 14:43

Hello all,

I created my own breakout board for the STM32F405RGT6, but I'm unable to connect to it via the ST Link V2. The error is ''No Target Connected''.

I've tested this with an external 8Mhz crystal (with load capacitors) and without. All other pins are simple broken out. I've successfully connected to the STM32F4 Discovery using the exact same method.

After some searching, I found that pulling the BOOT0 pin HIGH allows me to see if the device is working. Sending 0x7F at 9600bps 8E1 to USART3 returns inconsistent bytes (changes all the time). On all pins of USART1, there is no response. The same thing on the Discovery board returns the expected 0x79 (on the first try, something else on all others).

This is the first time I've developed a breakout for STM32 devices, and it is possible I've missed a connection required for it to work. So far, it is simply VDD, VSS, PH0, PH1, BOOT0 connected.

Any help will be appreciated! Thank you!

Hon
39 REPLIES 39
honboxuan
Associate II
Posted on December 29, 2012 at 00:59

They're both exactly 1.25v! Isn't this out of our control though?

Posted on December 29, 2012 at 05:35

The system loader (BOOT0=H) allows for communication via USART1 or USART3. The 0x7F is only listened for once at reset, after that it is listening for commands.

I'd expect the VCAP pins should be ~1.2V, The upstream supply also needs it's bulk and decoupling capacitors. If the VCAP pins are not stable I'd expect all manner of problems.

So figure the pair of 2u2's on the VCAPs, a bunch of 100nF decoupling, and perhaps 4u7 on the 3V3 side, but minimally what the regulator expects to be driving.

I'd be looking at the STM32F4-Discovery board design, and probe pins to examine expected signal levels and stability.
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Posted on December 29, 2012 at 05:45

They're both exactly 1.25v! Isn't this out of our control though?

Well you can't control the target voltage, you're putting the bulk capacitors there to act as a charge reservoir so it stays at the desired voltage and doesn't flail around. Without adequate capacitance I'd expect you so see the voltage saw-tooth as the device depletes the charge, and then the source voltage is gated back on.

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honboxuan
Associate II
Posted on December 29, 2012 at 05:50

Thanks for replying again. I've been referring to the schematics all day! I'll try adding the 4.7uF and 100nF caps to the VDD line.

So far, the only levels that are unexpected are on the VCAP pins and PB2 (BOOT1), which is pulled-up via 10k but only measured to be ~0.3V. 

By the way, where can I find out about the commands for this system bootloader?

honboxuan
Associate II
Posted on December 30, 2012 at 01:40

Thanks for the links. I've added a cap 33uF, 35V (everything else is SMD) between VDD and VSS, and measured the voltages at VCAP pins. VCAP1 is ~0.25 and VCAP2 is 0.. I have absolutely no idea what's going on here..

honboxuan
Associate II
Posted on December 30, 2012 at 21:24

I've now assembled a third board (this time with extra care), and got the same result. VCAP1 is 0.25v and VCAP2 is at 0v.

As usual, any suggestions will be appreciated!
Posted on December 30, 2012 at 21:43

Like I asked originally, it would be helpful to see a complete circuit diagram with pin names and designators so participants here could provide you with clear direction, or point out flaws in the wiring.

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honboxuan
Associate II
Posted on December 30, 2012 at 21:50

I'll work out the connection diagram in a bit. Thanks!

honboxuan
Associate II
Posted on December 31, 2012 at 00:25

I've attached a labelled image of my board. The PCB does nothing other than connect the VDD and VSS pins together (and breaking the other pins out).

I've left the NRST pin out for now. Even though the datasheet says the chip resets when NRST is LOW, it doesn't seem to affect the testing so far. Also, I've changed the power supply to use a voltage regulator.

I've probed the VCAP pins again, and VCAP1 fluctuates (between 0.2v and 2v), but VCAP2 is at 0.

Any help will be appreciated. If there're any unclear connections in the image, please let me know!

________________

Attachments :

Connections.jpg : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I1ER&d=%2Fa%2F0X0000000blQ%2F.segxu5Ez97zo35MfIPQtRZdnnJQmk3qPaepiADamcY&asPdf=false