Can STM32F105 do 13-bit SPI with 13 clocks?
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Email to a Friend
- Report Inappropriate Content
‎2022-08-23 10:21 AM
I need to interface with a Viniculum II from FTDI. It requires 13 bits over exactly 13 clocks, per this app note. We're using the STM32F105 with HAL libraries from STM32CubeMX. I don't see the cube able to configure to 13 clocks. Will the STM32F105 hardware be able to do only 13 clocks, if I hack the HAL library or write my own? Or is the hardware not able to do 13 clocks?
- Labels:
-
SPI
-
STM32F1 Series
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Email to a Friend
- Report Inappropriate Content
‎2022-08-23 11:20 AM
>>Will the STM32F105 hardware be able to do only 13 clocks,
No
Perhaps in a group, say 13 x8, ie 13 8-bit bytes or 8 13-bit words
Up vote any posts that you find helpful, it shows what's working..
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Email to a Friend
- Report Inappropriate Content
‎2022-08-23 11:31 AM
Thanks. Now I'll look into the Viniculum II. It might be d*mb sh*t firmware programming at 13 bits, because the hardware itself seems to handle 8-bit words. It does add some status info and I'll have to check, but it's 12, not 13. Finally, the VNC2 timing diagrams include MISO and MOSI and #CS, but not CLK. Who's idea was that? FTDI reputation was the top 20-30 years ago. Today? I'm wondering...
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Email to a Friend
- Report Inappropriate Content
‎2022-08-23 12:55 PM
You can always bit-bang it.
ST's designs for SPI have always been a bit simplistic and limited, other platforms have width setting span useful ranges like 5 to 32, and byte counts for CS pins..
Up vote any posts that you find helpful, it shows what's working..
