Can STM32 read external FIFO through the FSMC interface?

[RLee.7]

I want to use FSMC to read external FIFO implemented in an FPGA. Since there is no mode of FSMC that can match FIFO interface exactly, so I want to use the modified synchronous multiplexed PSRAM mode.

The plan is like this

A[25:16]: Ignored, don't connect to FIFO;

NEx, NOE, NADV: Implement a simple logic in FPGA that when NEx is valid and the NADV is data valid, connect the inverted NOE to the RD port of FIFO;

NWE: ignored, only read operation is needed;

D[15:0] : Connect to the output data port of FIFO;

There may be also some logic in FPGA to adjust the timing between NOE and D[15:0], but that is not a big problem.

What I want to ask is

1. Is this plan feasible? What should I take care of when implement it?
2. How can I extend the data burst length as long as possbile? Since there are 2048x16bit in one frame, I want to read them all in one burst if possible.

[turboscrew]

It's hard to say without knowing about the FIFO signals and their timing requirements.