2017-10-27 05:52 AM
I am currently in the development process of a new product and I need the timer to run at a much higher frequency than the datasheet specifies.
I have a 32MHz clock connected to the processor and I need minimum 96MHz on the timers. But only on the timers. The rest of the processor is allowed to run at 'only' 32MHz.
Does anybody know if the hardware can handle such a setup?
Solved! Go to Solution.
2017-10-27 07:13 AM
The idea of values given in datasheet is, that they are guaranteed by the manufacturer. There's quite a lot of things going into characterization and testing.
In other words, overclocking - in any its form - *may* work. It may work on your bench, at a limited range of temperatures, voltages. Or not. And then it may fail in the field for a bunch of reasons. Or not. And it may fail for a seemingly unrelated thing - e.g. based on state of a module neighbouring to the timer on the silicon - or in a surprising way - e.g. it counts up to 13 and then jumps to 15.
So, then the risk is entirely yours; there's no point asking here.
JW
[EDIT] Besides... the timers on STM32 (except the low power ones, which unfortunately have no specs as per max asynchronous external clock) run at the system clock or a fraction of it, so you'd need to run the whole chip at the elevated frequency, too.
2017-10-27 07:13 AM
The idea of values given in datasheet is, that they are guaranteed by the manufacturer. There's quite a lot of things going into characterization and testing.
In other words, overclocking - in any its form - *may* work. It may work on your bench, at a limited range of temperatures, voltages. Or not. And then it may fail in the field for a bunch of reasons. Or not. And it may fail for a seemingly unrelated thing - e.g. based on state of a module neighbouring to the timer on the silicon - or in a surprising way - e.g. it counts up to 13 and then jumps to 15.
So, then the risk is entirely yours; there's no point asking here.
JW
[EDIT] Besides... the timers on STM32 (except the low power ones, which unfortunately have no specs as per max asynchronous external clock) run at the system clock or a fraction of it, so you'd need to run the whole chip at the elevated frequency, too.
2017-10-27 07:37 AM
>>
Does anybody know if the hardware can handle such a setup?
The L4 will get to 96 MHz, the L0 will not.
You can't separate the CPU clock from the APB/AHB clocks in the manner you suggest.
2017-10-30 12:00 AM
Thank to both of you! Clive One and waclawek.jan. I just thought it was best to have turned all the stones before proceeding.
Have a great day!
/K