CACHEING OF BACKUP RAM
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‎2019-05-16 5:47 PM
With the data cache enabled is the backup ram cached such that an Invalidate Cache instruction is required to write the data through?
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STM32H7 Series
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‎2019-05-17 1:31 AM
Well, that of course depends on how do you set the areas in MPU, but the default setting is so that the backup SRAM is cached together with all other RAMs.
JW
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‎2019-05-23 7:16 PM
Hi WJ
Thanks for that.
I thought that was the case.
I'm not using the MPU as the application is fairly small in terms of its RAM requirements and a lot of the RAM is allocated in scatter files for the DMA buffers. I'm not using the heap in the application part.
I assumed the cache was used and so i clean the cache after writing.
It works fine.
That leads me on to another question.
Do you have any guidelines on when I should use the MPU?
Regards
Rob
