Bus Fault but CSFR = 0x400 is a reserved bit

[DarkTaipei]

Posted on August 18, 2017 at 23:06

I modified the source code from the ST library example LwIP_HTTP_Server_Socket_RTOS and make it work on our board. At first, everything is good, http server, UART console, USB console, telnet client all works. 

Until now when I added the 11th thread/task in FreeRTOS.

This is the symptom of the issue:

After I added 11th thread and boot, everything is good until I click on http dynamic task page (the exact one from the example). Then it will generate bus error. 

The funny thing is that clicking static page is ok. 

I check FreeRTOSConfig.h, lwipopts.h and didn't find any problem. I reserved 80k+ for heap and by the time problem happened, there are still 20K+ available. Stack watermark on each thread seems ok too.  So i doubt it's memory issue.

As long as it's 10 thread or lower, the dynamic page http is ok. 

The worst is the register content. 

HSFR = 0x40000000 , it's ok. but CSFR is 0x400. I checked the document, it's reserved bit of bus fault.

LR is 0x08007a63, which is Ethernet IRQ. and PC is 0x0800f20C, this is inside the HAL_ETH_IRQHandler in stm32f7xx_hal_eth.c

The screen and disassemble is in the screen shot.

This is the register contents:

HSFR 0x40000000, CSFR 0x400, R0 x200230c8, R1 0xa5a5a5a5, R2 0x10000, R3 0x200230c8, R12 0x a5a5a5a5, LR 0x08007a63, PC 0x0800f20c. PSR 0x6100004d.

The processor is stm32f767NI,

the ST library is STM32Cube_FW_F7_V1.7.0

Any clue will be greatly appreciated.

Thanks.

Sink.

#dyslexia

[Tesla DeLorean · Accepted solution]

Posted on August 18, 2017 at 23:31

You mean the *CFSR* IMPRECISERR? ie a busted write just a bit earlier

http://infocenter.arm.com/help/topic/com.arm.doc.dui0646a/DUI0646A_cortex_m7_dgug.pdf

There's a screen-shot? or a cross-post?

#dyslexia

‌

[DarkTaipei]

Posted on August 18, 2017 at 23:50

Hi, Clive.

Thanks a lot. After 2 days struggling on this issue and send the previous message. I suddenly found my stupid mistake.

Instead of looking at BFSR inside CFSR. I accidentally stumped into MMFSR of the CFSR and thought the bit is reserved. This is not a cross post. just simply dyslexia...

Yeah, I found the buffer over write issue. nothing to do with thread, Ethernet, IRQ or memory allocation. Basically, just a stupid mistake with a totally wrong direction of checking.

Regards,

Tyy