There is a bug in the ST HAL_GPIO_DeInit() function in stm32f1xx_hal_gpio.c, where it uses the CLEAR_BIT() macro to perform a read-modify-write of the GPIOx->ODR register directly to clear some GPIO pins, as opposed to the better way of clearing them using the GPIOx_BSRR register to do it atomically. Using CLEAR_BIT() to to modify port pins directly can result in an unexpected on/off state on other GPIO pins being used on the same port, if those other pins are set/cleared in an interrupt that happens to occur right in the middle of the read-modify-write operation. I spent 8 hours chasing down this problem when a GPIO pin I cleared in an ISR was being reset almost immediately upon exiting the ISR. In all the other places in stm32f1xx_hal_gpio.c where port pin states are modified, the correct GPIOx->BSRR register is used for atomic pin state assignment. The bug fix described below will correct this in the HAL code:
FIX:
Toward the end of the HAL_GPIO_DeInit() function in stm32fxx_hal_gpio.c, replace this line of code:
CLEAR_BIT(GPIOx->ODR, iocurrent);
with this line of code:
HAL_GPIO_WritePin(GPIOx, (uint16_t) iocurrent, GPIO_PIN_RESET);
Is there any way the HAL / CubeMX could be updated to fix this? I can fix it in my code, but if I have to tweak the settings in CubeMX and regenerate code, my fix will be wiped out.
I'm not sure if it matters, but I am using an STM32F100R8T6, and STM32CubeMx version 6.1.0.
