Either POR or BOR the implication is voltage has dropped below a safe operational level for the STM32 core, so retaining internal flags isn't reliable. Now if you assume POR is a cycle, voltage to 0V then back up to Vdd, but BOR only drops below the BOR threshold, default or option byte setting, then you have a detectable condition. If power is lost, SRAM will lose its contents, but if the BOR stops at a point where SRAM is preserved, then you can detect a POR based on retaining or losing the contents of SRAM. If voltage drops below SRAM retention then there's no real differernce between BOR and POR.
Set the BOR to a threshold above SRAM retention. Write a signature value to a reserved word in SRAM, or several in separate banks. Check if that signature is valid after a reset. If not, POR, otherwise BOR. Don't use SRAM in backup domain if there's a separate Vbat supply.
Jack Peacock
