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Avaraging unsigned integers

oeliks
Senior

Hi, Im searching way to avarage two unsigned 32 integers.

Is there any hardware help in doing this with stm?

1 ACCEPTED SOLUTION

Accepted Solutions

unsigned 32-bit, the assembler would allow for a two register add with carry output, then rotate right to recover the overflow carry, and then decide if you need the low-order bit dropping into the carry should round up, or not, basically an ADC with zero immediate.

So 2 or 3 assembler instructions, all fast ones

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9 REPLIES 9
RMcCa
Senior II

Smells like a homework assignment. Division by powers of 2 with unsigned math is super easy. ​

oeliks
Senior

Man ... oh man =) Im not asking for software implementation but is there a hardware acceleration =) in stm32.

IThink I read that some stm's support hardware ADC avaraging (addind next measurments and bit schifting).

Its hobby, too old for homework :)​

​Im interested in stmf103 f303 h750 - playing with this micros 🙂

S.Ma
Principal

It already show that your question is not specific enough to get the anwer you look for.

Averaging 2 numbers by hardware... the core is not?

Well, at least look for FMAC CORDIC DFSDM peripiherals on the web to look for non core application specific accelerators.

oeliks
Senior

Well Yes, question was not specyfic enough 🙂 I ment without core.​

Thanks :)​

berendi
Principal

The ADC averaging module is hardwired to average ADC values.

DMA2D can average 8 bit values, like blending two bitmaps.

DFSDM can do 16 bit averages, much like the one in the ADC, but it can take input data from DMA.

Nothing I know of can do 32 bit averages outside the CPU core.

oeliks
Senior

So I implemented it in software.

But is it super easy? If it would be super easy there wouldnt be us patents solving this problem 🙂 I think. ​

Entertaining a cat with the shiny dot of a laser pointer must be a quite complicated task then, because there are no less than 5 patents covering it.

RMcCa
Senior II

Cast them as floats and use the fpu?

That's some hardware.​

unsigned 32-bit, the assembler would allow for a two register add with carry output, then rotate right to recover the overflow carry, and then decide if you need the low-order bit dropping into the carry should round up, or not, basically an ADC with zero immediate.

So 2 or 3 assembler instructions, all fast ones

Tips, Buy me a coffee, or three.. PayPal Venmo
Up vote any posts that you find helpful, it shows what's working..