ADC sample rate

[Ngai yuk kong]

Posted on May 04, 2018 at 07:47

Hi all,

I have seven adc channels to convert using STM32F051. I set the ADC to be triggered by timer 15. I also setup DMA to put all the converted results to a memory buffer and have a Transfer complete interrupt set. 

Here is the setting: 

Timer 15 using 100KHz

ADC set to complete whole sequence 

DMA in circular mode

Everything work except that when I toggle a I/O inside the DMA interrupt, I got the frequency around 5KHz.

Any direct correlation between this 5KHz with my timer 100KHz? The MCU specification has a diagram showing that during the conversion the timer trigger will be ignored until all the conversion is complete. Does it mean that there is no way to control the sampling rate????

Many thanks..

[AvaTar]

Posted on May 07, 2018 at 09:43

For higher sample rates and consequently short sample times, this means relatively high currents and low impedances.

This requires more attention to input buffer design.

You could get your inspiration from motor control applications, which use to read back motor currents at each cycle, up to some Msps.