ADC right supply for Vdda

[info146]

Posted on September 14, 2009 at 05:45

ADC right supply for Vdda

[info146]

Posted on May 17, 2011 at 13:22

Hi to all,

after deciding for STM32 cause of bitbanding nested INTs and last but not least 12Bit ADC I'm now evaluating the ADC with results not too good. The AD values jittering by ca. +-40Bit even with shortend Adin.I think this is a problem of gnd-layout and supply of analog part. configuration: STM32F103ZET6, Vddx 3,3V supplied by DCDC, Vdda supplied from Vddx over ferrit and 1n&1µ block-Cs, Vref supplied from +15V over 2,5V Ref 6325. so i will redesign PCB with optimized grounding and want to supply Vdda as well from the analog-supply by linreg. But here is the problem: datasheet 14611Rev6 5.3.1 says: Vdda must be same potential as Vddx with a maximum diff of 300mV (footnote). But APN2834 2.2.11 says it is desirable to have separate analog and digital supplies. so the question is: how can i manage Vdda - Vddx <= 300mV with different supplies especially during power up ??? during test with Vdda supplied from +15V over 3,3V linreg i obviously destroyed my first device yet due to Vdda(+15V) coming up later than Vddx and therefore diff between Vdda and Vddx > 300mV. any suggestions?, thanks!

[jj]

Posted on May 17, 2011 at 13:22

Quick/dirty suggestion:

Temporarily replace your switcher with a quieter, linear 3V3 supply and route this same voltage to both Vddx and to Vdda. (leave extra filtering components @ Vdda) Repeat your tests & comment. Be sure that you are ''not'' floating your analog inputs. Have a good, solid, lo-impedance source drive your target ADC inputs. (and be certain to keep input signal w/in ADC range) We've run analog signals and ''never'' observed jittering @ even 1/10th the levels you report. Plz try and post results...

[info146]

Posted on May 17, 2011 at 13:22

thanks jj.sprague for replying.

i think your suggestion goes the right way. after HF-shortening ADins via 100nF and an additional thick AGND wire the jitter seems to lower to a few bits. Additional SW-Averaging gets me where i wanted to: only LSB dancing. More an more it seems to be the same old boring story about cheap and noisy DCDC-Converters don't go together with analog stuff. From that point i can't decide wether inductiv or capazitiv coupling or just noise on supply or signal. Although mentioned in APN i will discard the idea of different supplies for Vdda and Vddx. But i plan to seperate them as good as possible. so the ToDo list for redesign looks like this: - optimize grounding system by: - star topology - agnd lines without any (inductiv) vias - agnd layer only for shielding purposes - replace 24/3v3 dcdc with a 24/5v to supply Vdda over 3v3 linreg - supply Vref over 2V5 ref from Vdda - supply Vddx over a second linreg from the same 5V - supply analog stuff with +-12V over next linregs from 24/+-15V dcdc how about that? comments wellcome

[obtronix]

Posted on May 17, 2011 at 13:22

Every time I've attempted star grounding I've had some kind of ground loop issue. I just use one massive ground layer and ensure that the digital and analog components are physically separated onto separate halves of the board so that digital return currents do not flow near analog circuitry

(and vice versa). With the micro in the middle. The general idea is to keep the small currents away from the large currents. I have been able to get a 16 bit convertor to flip only one bit (no software filtering) using this method with a switcher power supply followed by dual linear regulators (in series)

[jj]

Posted on May 17, 2011 at 13:22

Re: noise spoiling ADC results:

Glad you experimented and gained improvements. Would be interesting to re-install your original switcher & see ''level of improvement.'' Try to physically isolate your analog traces from any fast switching signals/devices - if you can surround analog trace with ground - that has helped. Obtronix idea of ''massive ground layer'' makes sense - but may require the cost of 4 layer pcb. (most always better results - eased layout if your budget allows) We also add ''option'' of 16b or 20b external ADC on our STM32 boards. With 2 layer only pcb we achieve lsb ''dance'' @ 16 bits and 2 lsb dance @ 20b. (we average 4-8 conversions to try and compensate) Hate to say it - sometimes the external, higher res. ADC can avoid many of the noise/ground issues caused by the ''complex/busy'' ARM mcu. (not just ST's...)

[info146]

Posted on May 17, 2011 at 13:22

Hi guys, thanks for your comments,

jj.sprague - yes i did the improvements without changing supplies. obtronix - i think -when done right- your grounding system is a star - in fact with only two beams. But your connection (meeting point) might be the better one. So this seems to be the biggest mistake i made in this design: I connected AGND-Layer to DGND-Layer directly under µC (near Vssa-Pin). So AGND return current has to share DGND-Layer with the unfriendly DGND current for the last few centimeters. On the other hand i found out in earlier designs that the advantage of massiv AGND layer is often destroyed by using small and therefore induktiv vias to connect to this layer. Furthermore i observed different analog channels influencing each other - especially when one is in klemm-state (forced to allowed ADin range by two klemm-diodes) with about 10mA of current- when connect to one AGND layer. so in redesign i will try to give every channel his own return path, if possible on top layer without any vias. - there is the star again - AGND layer (inside-layer) i only will use for shielding. i agree with you both that handling of external ADCs is much easier. but i'm using 10 channels within this design and i wanted to have a look whether this is possible with integrated 12bit-ADCs and good results.

[obtronix]

Posted on May 17, 2011 at 13:22FWIW, you might find some useful info in this link, (I always use the figure 9 setup, one solid layer for both analog and digital grounds and no spliting of the ground plane.) http://www.hottconsultants.com/pdf_files/june2001pcd_mixedsignal.pdf in any case, always connect the A/D or micro's DGND and AGND pins together to your analog ground plane

[info146]

Posted on May 17, 2011 at 13:22

thanks obtronix,

great link, very nice short form guide i will think it over... one solid gnd layer might be a good idea, especially on a STM32 system, because Vdda and Vssa are no truly dedicated analog pins (feeding digital PLL and RCC as well) thanks to all repliers