ADC Noise : too much

[ingwmeier]

Posted on January 03, 2012 at 09:36

ADC Tests with stm32value eval board.

PC4 as AD Input, conversion all 20msec, 20turn Pot with 22k u1 RC Filter to PC4. Software looks for max and min adc values. I let it run for 30000 conversions: I get errors up to 16count at Zero, up to +16 / -40cnt at about half scale, -52count at full scale. Sometimes the values are stable for some hundred conversions, then extremes hit. I did the same tests with an old Keil STM32 board about 3 years ago with same results (but different software). The conversion is initialised with the slowes ADC conversion to minimize input impedance effects. Has anybody found a solution (except filtering/averaging) / has anybody found similair behaviour. Regards Werner

[acelec]

Posted on April 30, 2013 at 13:39

It is mixture of the sampling time and external Capacitor issue!!

The side effect of any SAR ADC is that the sample capacitor within the ADC is directly charged by the external signal, that means if the sample time is insufficient, then the charge left on the sample capacitor by the previous conversion of a channel can affect the accuracy of the channel currently being converted. Generally, some users place a large capacitor “Cext�? (100nF ) from the ADC pin to ground, This capacitor is used to lower the source impedance of the channel as seen by the ADC so that the internal sample capacitor can be charged quickly. But this will create a charge-sharing process between Cext and Cs, whose RC time constant is primarily determined by the maximum ADC input resistance (1KOhm) and maximum sample capacitance (8pF) of the ADC.