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How to choose the Timer Input Capture Filter value

GBert.2
Senior

I'm using an STM32 to control a DC motor with a dual hall encoder feedback.

To monitor motor position I want to use a General Purpose Timer (16bits) in Encoder Mode.

As my input is noisy, I want to filter the signal using the Input Capture filter.

My problem: I don't find any information about the ICTimer.

Here's what I found in the AN4013 - STM32 cross-series timer overview Application note

> "Program the filter by writing the IC1F[3:0] bits in the CCMRx register, and the prescaler by writing the IC1PSC[1:0] if needed"

What kind of filter is this?

How do I choose the value for IC1F?

What is the cutoff frequency?

Your help is appreciated.

1 ACCEPTED SOLUTION

Accepted Solutions

I fail to see how this works as a filter.

The following figure from AN4776 illustrates how the input capture filter rejects short pulses (i.e. noise):

0693W00000Kb3BaQAJ.pngIt's not a perfect solution, of course. It introduces delay, and it's aimed at removing random switching noise not periodic interference (in which case it may produce confusing results).

JW

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9 REPLIES 9
KnarfB
Principal III

You are not specifying the chip, so I took G4 series as an example. Ref. manual RM0440 Rev 6 says in 28.3.9 Input capture mode "Let’s imagine that, when toggling, the input signal is not stable during at must 5 internal clock cycles. We must program a filter duration longer than these 5 clock cycles.". So the filter is just debouncing transient transitions. It is named "Filter downcounter" in the figures.

ICPS is a prescaler. No idea what it is used for except for extending the counter range.

hth

KnarfB

Which STM32?

> As my input is noisy

Specify.

> What kind of filter is this?

It's very simple: if input level changes, output changes only after filter samples the same level for the prescribed number (N) of samples. You can select several levels of N and several prescalers for the sampling frequency.

JW

Wouldn't the prescalers divide the input pulses, so you'd need 4 or 8, or whatever, to get a single count?

The clock divider of the filter drops the sampling frequency, ie clocking of the synchronizer circuit

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Sorry for the confusion with the many prescalers:

  • there is a common prescaler for filters in all 4 channels (and for dead-time detection where applicable), set in TIMx_CR1.CKD (resulting in fDTS)
  • individual settings of TIMx_CCMRx.ICxF use a further subdivision of either directly the timer's internal clock (***_INT) or its prescaled version (fDTS)
  • as Clive said above, IC1PSC determines, after how many filtered edges will an actual capture occur.

JW

GBert.2
Senior

Hi @Community member​ ,

Thanks for you answer.

> It's very simple: if input level changes, output changes only after filter samples the same level for the prescribed number (N) of samples. You can select several levels of N and several prescalers for the sampling frequency.

What you're describing seems like a counter.

If it's the case, how is the hysteresis working?

> as Clive said above, IC1PSC determines, after how many filtered edges will an actual capture occur.

From my observation, I don't think it's the case.

The filter seems to behave like a low pass filter: filtering out rapid variations, regardless of the number of edges.

> What you're describing seems like a counter.

You can look at it as a counter. This is exactly how debouncing algorithms work in software, too.

> If it's the case, how is the hysteresis working?

What hysteresis are you referring to?

>> as Clive said above, IC1PSC determines, after how many filtered edges will an actual capture occur.

>  From my observation, I don't think it's the case.

> The filter seems to behave like a low pass filter: filtering out rapid variations, regardless of the number of edges.

ICxPSC does not control the filter itself.

JW

GBert.2
Senior

Hi everybody,

I think I don't understand what you're saying.

When I implement a low pass filter with a counter, I put two hysteresis thresholds.

Here's a rapid drawing about the relationship between the input, the counter and the output.

0693W00000Kb2vNQAR.png 

I fail to see how this works as a filter.

The following figure from AN4776 illustrates how the input capture filter rejects short pulses (i.e. noise):

0693W00000Kb3BaQAJ.pngIt's not a perfect solution, of course. It introduces delay, and it's aimed at removing random switching noise not periodic interference (in which case it may produce confusing results).

JW

GBert.2
Senior

The AN4776 had the details needed.