2025-08-20 6:21 AM
[PN]: STSPIN32G4
[VERSION]: 6.4.1
[TOOL]: Motor Control Workbench
[DETAILS]:In this design, both motors sit with all motor phases at Vmotor, despite specifiying high side off in Motor control workshop. All six high side drivers are turned on and stay on until a motor start command is sent.
Interestingly, by default the drive signals read PE8 to PE13 all read back as zero in the GPIOE IDR register, but the outputs GHS1, GHS2, GHS3 are all at VM voltage and GLS1, GLS2 GLS3 are all at 0V.
When the PWM signal starts, the high side FET does not seem to switch off fully as the low side FET is turned on and a fault current is detected. Sometimes the fault current is just low enough to allow the motor to start. See attached picture.
[EXPECTED BEHAVIOR]: The Hi side FETs should be turned off in the default state, (maybe even the Low side could be turned on?)
[HOW TO REPRODUCE]: Compile and run. default state is visible.
2025-08-21 7:37 AM
Hello @GSB,
Thank you for your report.
We are investigating the issue and will provide an update shortly once we have more information.
In the meantime, for error description and management, refer to the documentation available through Workbench tool > About > Documentations > Documentation > User manual tab, (FOC) Firmware errors.
2025-09-22 8:22 AM
Hello @GSB,
When the power stage is in high impedance, it is expected the OUTx pins are equal to VCC (usually set at 12 V at init). This is due to the integrated bootstrap diode and the capacitive connection between BOOTx and OUTx
In your waveforms the high side gate drivers are not turned on because in that case the GHSx must be HIGHER than OUTx. In the waveforms they are at the same value.