[PN]: STSPIN32G4
[VERSION]: 6.4.1
[TOOL]: Motor Control Workbench
[DETAILS]:In this design, both motors sit with all motor phases at Vmotor, despite specifiying high side off in Motor control workshop. All six high side drivers are turned on and stay on until a motor start command is sent.
Interestingly, by default the drive signals read PE8 to PE13 all read back as zero in the GPIOE IDR register, but the outputs GHS1, GHS2, GHS3 are all at VM voltage and GLS1, GLS2 GLS3 are all at 0V.
When the PWM signal starts, the high side FET does not seem to switch off fully as the low side FET is turned on and a fault current is detected. Sometimes the fault current is just low enough to allow the motor to start. See attached picture.
[EXPECTED BEHAVIOR]: The Hi side FETs should be turned off in the default state, (maybe even the Low side could be turned on?)
[HOW TO REPRODUCE]: Compile and run. default state is visible.
