2019-04-26 06:50 AM
Hardware & HAL:
Tested:
Result:
My Conclusion:
Question:
Attachment:
Hint: 2xUART IRQ below is send of new 64 byte buffer because TXE IRQ is immediate empty after byte moved to shift out register in UART
2019-04-26 08:09 AM
> why. we need 3us @ 210MHz = 630 clock cycles with HAL for this UART IRQ
Does the UART interrupt preempt USB?
We have no idea what the IRQ handler does besides of the HAL library overhead.
Generally, prefer LL for working with UARTs. The HAL library is not good.
-- pa
2019-04-26 08:14 AM
Yes, but its called NVIC (Nested Vector Interrupt Controller by ARM) in the RM: USB Prio 7 channel 0; UART Prio 5 channel; so UART is doeing nested IRQ with the USB IRQ..and USB is continued later after pop of stack
What IRQ total times do you have round about for simple stuff like UART @ core speed ?
I can live with UART IRQ time . Did you wrote complete USB handler with LL ?
A lot off LL marcos are removed in 1.15 for STM32F7xx; I noticed on porting my DMA RX handler from f3xx
2019-04-26 08:39 AM
Don t use HAL for usart.
Not using H7 however i think usart ip version do include fifos now.
Do use LL.
I think Interrupt takes 12 cycles max to enter, then same to exit, if not using float within interrupts.
Some people use DMA in a rolling buffer to emulate a fifo which will be checked every msec....
2019-04-26 08:59 AM
I'm not familiar with F7 family, but Arm v7m ARM says (about exceptions)
"When pushing context to the stack, the hardware saves eight 32-bit words, comprising xPSR, ReturnAddress, LR
(R14), R12, R3, R2, R1, and R0."
Those are, of course popped at exception return.
That takes some cycles alone.
Then Cube has somewhat "complete" handling of interrupts. It checks about all possible causes and calls callbacks if callbacks for pending reasons are configured.
That makes interrupt processing a bit slow. At least slower than ad-hoc interrupt handling that only checks for necessary things.
2019-04-26 09:58 AM
2019-04-26 10:16 AM
thanks for the info turboscrew
2019-04-26 11:08 AM
Everytime there is a jump or a call(back) in the interrupt and the ART accelerator is lost, hence the RAM location for ISR.
2019-04-26 12:29 PM
LL should not be used for UART interrupts, CMSIS is quite appropriate there.
Moreover, an interrupt for a UART makes sense to handle a crash and terminate packet transmission.
Everything else should be done by dma.
2019-04-26 03:46 PM
> but its called NVIC (Nested Vector Interrupt Controller by ARM)
If I remember correctly, preemption (nesting) of interrupts should be enabled. By default NVIC does not preempt, only prioritizes.
> Did you wrote complete USB handler with LL ?
USB is complicated, so I use the HAL library for it. UARTs are simple, so can be done with LL or home brewn register access code.
If ST has not turned around to provide a LL library for F7 yet, you can borrow the code from other compatible MCUs.
DMA can be a better solution for several busy UARTs, but more complicated.
--pa