When is the IDLE line detection interrupt triggered for UART?

[DNied.3]

Hello,

I'm trying to use the async Zephyr UART stm32 api, but I've encountered an issue. I'm using STM32F412.

I'm trying to use the Zephyr UART stm32 async API(with DMA), with 3Mbps. I can see that the received data are correct so the baudrate/frame/DMA settings are ok. The issue is that I receive two packets (8 bytes each) at once. The packets are sent with delay(even more than 100ms) between them. I can see that the IDLE line detection is used to inform the UART driver about the end of receiving. Unfortunately, it looks like the IDLE interrupt comes too slow in my case. The interrupt is triggered only once with recieved 16 bytes instead of 2 times with 8 bytes.

I program DMA to recieve 528(max packet size), so TC/HT DMA interrupts are triggered.

I've been studying the RM(RM0402) a lot, but I'm not sure about one topic. Please correct me if I'm wrong. The IDLE line is detected when the IDLE character/IDLE frame is detected. But I'm not sure what the IDLE character is. The Reference Manual says:

"An Idle character is interpreted as an entire frame of “1�?s followed by the start bit of the next frame that contains data (The number of “1�? ‘s will include the number of stop bits)."

So my question is: is the start bit of the next frame required to detect the IDLE frame? Or the IDLE frame is detected after 10(start bit + 8 data bits + stop bit) "1"s, right after receiving a new frame and the start bit of the following frame is not needed to trigger the IDLE interrupt.

BR,

Dawid

[gbm]

From my experience and wild guesses: with F1 and F4 "old style" UART you may reasonably check and service the IDLE flag only when new data is received - it signals that there was idle time before the incoming data. I was unable to use this flag reliably for detecting and servicing the idle condition in any other scenario, in particular idle state interrupt didn't work for me in a reasonable way (ok, maybe I am too dumb for it). With newer UART, like in L4 series, IDLE flag is set when idle state is detected and you may properly clear it while servicing idle interrupt.

[DNied.3]

Thanks for your answer.

You might be right. There is a difference in describing the Idle character for STM32F4 and STM32L4.

F4:

An Idle character is interpreted as an entire frame of “1�?s followed by the start bit of the

next frame that contains data (The number of “1�? ‘s will include the number of stop bits).

vs L4:

An Idle character is interpreted as an entire frame of “1�?s (the number of “1�?s includes the

number of stop bits).