cancel
Showing results for 
Search instead for 
Did you mean: 

Throughput on STM32H533 OCTOSPI external Flash + Ram

AJone.5
Associate III

I have a system that I am migrating from a part with more RAM to the STM32H533.  I already have external FLASH set up and operating well but the amount of RAM available for heap is anemic for future growth.

The external flash is running on the OCTOSPI in quad-spi mode to save on pins.  The goal would be to not add many if any pins for external PSRAM and use chip select to move between the two spaces.

It looks from the docs like this is doable, there are examples on other micros in this doc https://www.st.com/resource/en/application_note/an5050-getting-started-with-octospi-hexadecaspi-and-xspi-interface-on-stm32-mcus-stmicroelectronics.pdf and the H533 documentation talks about external Flash options with OCTOSPI.

What I am wary of is trying to memory map on both peripherals using the same pins for the heap while executing code out of our external flash.  Our application is not super intensive but we do have a display to animate and such so the throughput can't be terrible.

Is this only practical with OCTOSPI1 for one and OCTOSPI2 for the other?  Or can we make it work with the chip select on OCTOSPI2 controlling which chip we are mapped to?

Anyone done the same or have advice on optimizing this? 

1 REPLY 1
AJone.5
Associate III

On closer examination it looks like the configuration in Figure 7 page 24 would work for us, mutiplexing between flash and ram.. though their example does not show a PSRAM usage..  The time based multiplexing has to be a hit to speed of course, but with cashing and such not sure how much.