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The X-CUBE-EEPROM library not working with the STM32G474RB or dual Flash bank problem

BPrem.1
Associate II

I used the NUCLEO-G474RE (NUG474RE$AT1) board to test the X-CUBE-EEPROM library. I did not notice that the STM32G474RBT3 had been soldered instead of STM32G474RETx. It appears it has been soldered to the PCB originally since there are no signs of PCB rework / IC replacement and we have never used this chip version in our company. Anyhow, while testing using the aforementioned processor, I encountered the following problems.

I wrongly assumed first that the STM32G474RBT3 had 512 kB of Flash when it actually has only 128 kB. I set START_PAGE_ADDRESS to 0x0807C000, which is before the end of the 512 KB Flash. I encountered an issue with the PAGE(__ADDRESS__) macro. When the page address is too large, meaning it falls outside the Flash area, the current implementation truncates the value so that it falls within the area. However, it would make more sense to report an error.

After I realized that my "test device" has only 128 kB of Flash, I changed the emulated EEPROM START_PAGE_ADDRESS to 0x0801C000, which is close to the end of the second 64 kB Flash bank of the STM32G474RB. I discovered that the FI_PageErase() function does not erase the requested Flash page. I checked the code execution down to the FLASH unit register level, and in my opinion, the code is executing correctly. It sets PNB to 0x18, PER to 1, and BKER to 1 (page 2) before setting START to 1. According to "Table 2, Product Specific Features" in the STM32Gxx reference manual, the STM32G474RB also has dual-bank Flash. Note that if I manually set PNB to 0x38 and BKER to 0 (bank 1) before START is set to 1, the page at address 0x0801C000 is erased. Overall, it appears that the STM32G474RB does not have two Flash banks. If this is true, then this should be supported in the X-CUBE-EEPROM library (using just one bank for devices with smaller Flash). For STM32G474/473 processors with 512 KB of Flash memory, page erasure in the second bank functions properly, as does EEPROM emulation.

1 ACCEPTED SOLUTION

Accepted Solutions
Florian LR
ST Employee

Hello @BPrem.1 , 

It's quite surprising to see that you have a 128kB sample instead of a 512kB sample soldered natively on the Nucleo, but let's focus on the situation with the 128kB die.

First, I confirm that the STM32G474RB has single and dual bank, the data width being defined by DBANK value, DBANK=0 for single bank with a read access of 128bits, and DBANK=1 for dual bank mode with read access of 64 bits. The X-Cube is ported on dual bank G4 series because at the time, the middleware didn't take in charge 128bits read access, that's why it is not written in the AN4894 that single bank is supported, however, since the U5 series introduced in the X-Cube 128bits read access, you can make the porting if you want to use the EEPROM Emulation with single bank mode. 

Regarding now your issue with the dual bank mode, you set START_PAGE_ADDRESS to 0x0801C000. Each Flash page is 2Kbytes, bank 1 start address is 0x0800 0000 and bank 2 start address is 0x0804 0000, so the bank you're targeting is bank 1, however, 128kB devices have 32 pages by bank so the last page start address of bank 1 will be 0x0800 F800, so the address 0x0801C000 is out of range.

You can find the description of Flash sizes and page addresses in the Reference Manual RM0440, table 7.

 

Best Regards, 
Florian

 

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7 REPLIES 7
Saket_Om
ST Employee

Hello @BPrem.1 

Thank you for bringing this issue to our attention.

I reported this internally.

Internal ticket number: 212311 (This is an internal tracking number and is not accessible or usable by customers).

To give better visibility on the answered topics, please click on "Accept as Solution" on the reply which solved your issue or answered your question.
Saket_Om
Saket_Om
ST Employee

Hello @BPrem.1 

Most important point I see there is why are we referring to STM32G474RB instead of STM32G474RE, and if we were indeed talking about STM32G474RB, why are we considering the fact that it's not a dual bank chip when it is, and I don't see anything in the errata sheet saying the dual bank is not working on G474.

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Saket_Om
BPrem.1
Associate II

It seems we don't fully understand each other.

My plan was to test the X-CUBE-EEPROM library on the STM32G474RE processor (512 kB Flash) on the NUCLEO-G474RE (NUG474RE$AT1). However, since the NUCLEO had the STM32G474RB, which has 128 kB Flash, I discovered the problems I described. Erasing Flash pages in the upper 64 kB f the 128 kB Flash of the STM32G474RB did not work. EEPROM emulation only worked if I set START_PAGE_ADDRESS so that the Flash pages intended for emulation were in the lower half (in the lower 64 kB). If they were in the upper half, then EEPROM emulation did not work. The reference manual for the STM32G4 states that the STM32G474RB also has two Flash banks, and the X-CUBE-EEPROM library also works as if it did. However, when I tested it, the issue did not work in the upper 64 kB Flash of the STM32G474RB, but in the STM32G474RE it works in the upper 256 kB (in the second Flash bank).

Hello @BPrem.1 

Support for 128 KB on X-CUBE-EEPROM is currently not supported on the STM32G4, as the migration from 512 KB to 128 KB has not yet been done. However, it is supported on the STM32U5.

To give better visibility on the answered topics, please click on "Accept as Solution" on the reply which solved your issue or answered your question.
Saket_Om

Hello Saket,

I assume that the information "migration from 512 KB to 128 KB has not yet been done" refers to the X-CUBE-EEPROM library. The information that only the 512k Flash version is supported for STM32G4xx is not in AN4894 and I couldn't find it in the X-CUBE-EEPROM ZIP file (in the source code). It is also not in the X-CUBE-EEPROM Data brief.

Branko

Florian LR
ST Employee

Hello @BPrem.1 , 

It's quite surprising to see that you have a 128kB sample instead of a 512kB sample soldered natively on the Nucleo, but let's focus on the situation with the 128kB die.

First, I confirm that the STM32G474RB has single and dual bank, the data width being defined by DBANK value, DBANK=0 for single bank with a read access of 128bits, and DBANK=1 for dual bank mode with read access of 64 bits. The X-Cube is ported on dual bank G4 series because at the time, the middleware didn't take in charge 128bits read access, that's why it is not written in the AN4894 that single bank is supported, however, since the U5 series introduced in the X-Cube 128bits read access, you can make the porting if you want to use the EEPROM Emulation with single bank mode. 

Regarding now your issue with the dual bank mode, you set START_PAGE_ADDRESS to 0x0801C000. Each Flash page is 2Kbytes, bank 1 start address is 0x0800 0000 and bank 2 start address is 0x0804 0000, so the bank you're targeting is bank 1, however, 128kB devices have 32 pages by bank so the last page start address of bank 1 will be 0x0800 F800, so the address 0x0801C000 is out of range.

You can find the description of Flash sizes and page addresses in the Reference Manual RM0440, table 7.

 

Best Regards, 
Florian

 

Hello Florian,

Thanks for the clarification. We often assume that something is where we expect it to be and don't check the documentation.

Best regards,

Branko