2023-12-08 01:03 PM
Hello all,
I am learning to implement a bare-minimal code that let PTP(OC, slave mode) works with STM32H755(Nucleo-H755ZI-Q with FreeRTOS). I have read RM0399, UM2217 as well as stm32h7xx_hal_eth.c with corresponding chapters. And here is the first draft I have done: https://codefile.io/f/vny07A1hYW. In this implementation only PTP-over-Ethernet (PTPv2) will be considered.
So basic ideas are:
+ "DataQ_PTP_Init" implements RM0399 §61.9.9 "Initializing the System time generation". This function will be called with ETH_Init(). As well as when network cable status is changed(connected).
+ "DataQ_PTP_DeInit" will be called when e.g. network cable is disconnected.
+ "DataQ_PTP_SysTime_Fine_Correction" implements RM0399 Page 3037 "System time correction" algorithm, with Fine-Correction only.
+ "DataQ_PTP_TSI_ISR" will verify Addend Register, has been updated correctly. By referencing RM0399 Page 3037 "System time correction" algorithm step 3-8. (When TSI interrupt is triggered.)
+ "DataQ_PTP_Rx_ISR" will update Master_Sync_Time and Slave_Clock_Time, used by Fine-Correction algorithm. (When Rx interrupt is triggered.)
My questions:
+ Could experts here help to identify logical / implementation errors?
+ From RM0399 Page 3037 "System time correction" Step 6. Should be "bit 3/TSUPDT" instead of "bit 4" shown on the document?
+ Why "System time correction" algorithm, step 8, says "reprogram ETH_MACTSAR with old value"? Should be the value updated from the next round of algorithm?
+ How "t3" and "t4" being used in this algorithm, with illustrated in Figure 831 from RM0399?
+ Does "Fine-correction" could be suitable used for initialization e.g. huge time differences between Slave and Master? I am thinking it will take long time elapsed till clock converged.
+ Seems the variable "Master_To_Slave_Delay" never got updated based on "System time correction" algorithm.
+ How to determine the value written to "MACPPSTTSR" and "MACPPSTTNR", from step 4 of "System time correction".
Sorry to say but this is the first time I touched PTP. So for sure there might be some misunderstanding or "guess-work"....
Big Thanks for your kindly help!
Best regards,
2024-08-20 01:40 AM
Hey @Leon_MS ,
I am also working on the STM32H755(Nucleo-H755ZI-Q) and have the same issue. Did you get any answer for your questions like " How to determine the value written to "MACPPSTTSR" and "MACPPSTTNR", from step 4 of "System time correction"."?
2024-08-20 08:02 AM
Hello @Markus123 ,
No I haven't received any message officially but, I have observed some behavior differences from the actual chip and its accompany reference guide. Maybe, H755 is not quite suitable for implementing PTP protocol unless those issues are fixed by either chip electronics or documentation got clarified.
If you are interested in what I have implemented and the use case, we can chat through private messages. Maybe we could find a better solution instead of the officials(And.... considered as official solution, who knows... :) )