Unfortunately, it doesn't work reliably. With D-Cache enabled, only the first file "FILE1.TXT" is created when powering on, but without content. If the board is in operation and the card is empty, and I just do a reset, both text files are created with content.
In following link it explains to change the "win element" in the struct FATFS and change something to aligned, but unfortunately there is no example code.
I lack a deep understanding of this cache issue, and the STM32 application notes does not really helped me (to complicated). What else needs to be adjusted to make it work reliably? I can't find any example code for STM32H750 or 745.
/* USER CODE BEGIN enableSDDmaCacheMaintenance */
#define ENABLE_SD_DMA_CACHE_MAINTENANCE 1
/* USER CODE END enableSDDmaCacheMaintenance */
* Some DMA requires 4-Byte aligned address buffer to correctly read/write data,
* in FatFs some accesses aren't thus we need a 4-byte aligned scratch buffer to correctly
* transfer data
/* USER CODE BEGIN enableScratchBuffer */
/* USER CODE END enableScratchBuffer */