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STM32H5 PTP free running PPS output

mathewm
Associate

I've got a pair of Nucleo-H563ZI boards on which I'm attempting to build an IEEE 1588 PTP solution.

PTP works. I can get PTP working using the gPTP implementation in Zephyr, and have both boards synchronising either with each other or with my existing PTP GM just fine.

PPS in fixed mode also works. I can write to ETH_MACPPSCR to set digital rollover to 1Hz and everything works as expected.

The problem I'm having however is with the PPS in flexible mode. In this mode, the PPS output seems to be a free running timer independent of the PTP clock. When the PTP clock is updated, the PPS output does not change and the PPS signals from neither board ever converge.

As it is, PPS flexible mode is useless as a timing reference for external peripherals or for measuring PTP sync accuracy. I'm sure I'm missing something here, but the RM0481 reference manual is a bit light on detail as to how all of this is supposed to work. Am I supposed to do something periodically to synchronise the PPS clock with the PTP clock, or is it really nothing more than a free running timer?

When the application starts, I'm configuring the PPS registers as follows, in this order

 
PPS target time seconds register (ETH_MACPPSTTSR)
0 = start when board is powered on
 
PPS target time nanoseconds register (ETH_MACPPSTTNR)
999999999 = generate pulse when ns register rolls over to 0 on 1s increment
 
PPS interval register (ETH_MACPPSIR)
50000000 = 1 sec pulse interval (50,000,000 * 20ns per tick)
 
PPS width register (ETH_MACPPSWR)
5000000 = 100ms pulse width (5,000,000 * 20ns per tick)

PPS width register (ETH_MACPPSWR)
TRGTMODSEL0 = 11: Target Time registers are programmed only for starting or stopping the PPS output signal generation. No interrupt is asserted.
PPSEN0 = 1: Flexible PPS mode
PPSCMD = 0010: START Pulse Train

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