Hello,
I found an interesting problem with the USB controller. Our device uses MCU STM32F756, with USB in FS Device mode.
We have a total of three USB IN endpoints, controlled via Azure RTOS / USBX middleware. With a heavy load on USB endpoints, sometimes an endpoint gets stuck. By observing the registers of the USB controller, I found that the given endpoint is ready to send data, but the FIFO empty interrupt is not enabled. These interrupts are controlled using the OTG_DIEPEMPMSK register.
The problem is that this register is shared by all endpoints and setting or clearing the relevant bit is not atomic. If the executive thread is preempted by the scheduler or the USB interrupt handler in the middle of a read-modify-write operation, the OTG_DIEPEMPMSK register may not be set correctly.
I solved the problem by using ATOMIC_SET_BIT / ATOMIC_CLEAR_BIT macros around the OTG_DIEPEMPMSK register (in HAL_PCD_IRQHandler, PCD_WriteEmptyTxFifo and especially the USB_EPStartXfer functions). It looks like the USB device is working exactly as it should.
