Hi
I'm fighting with stm32f107vct to work with external PHY LAN8720.
After many tries running it on FreeRTOS with lwIP I decided to start it over.
I disabled freertos and lwIP.
In CubeIDE I’m enabling only ETH, changing addresses of registers (since IDE doesn’t set it properly), changing PHY address.
When I’m debugging, during initializing ETH
BSR register (adress 1) = 30729 (0b0111100000001001)
Corresponding to the data sheet it’s proper value, so I consider that MAC is communicating with PHY 0b0111100000001001
Now my problem is that after connecting cable (rj45) I’m not getting bit responsible for link on (BIT 2).
LEDs aren’t blinking and after connecting a logic analyzer I do not see any activity.
maybe I will try it tomorrow with a oscilloscope.
On ETH_XTAL1 line I can see stable 50Mhz clock.
ETH_XTAL1 is also clocking MAC.
My schematic and BSR
