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SD card SDIO 1bit is killing UART3

LLeva.1
Associate III

I am using STM32F103VGT chip and custom PCB with USB, graphics LCD (FSMC mode), RTC, CRC, ADC, TIM2, TIM4 and UART3 (DMA/IRQ).

When I added SDIO, one data line (poling, IRQ or DMA) and FATFS, I noticed, that after mounting, reading and writing to SD card the UART3 is dead. No transmit and no receive. (I was using UART for debug purposes and was completely stuck for whole day that SD is bad. But I found it is working- files are created, read).

RTC, timers are firing, LCD display is showing new info. But the UART3 is not responding.

I increased heap and stack, minimized fatfs, but UART3 is still dead.

Is is possible, that cubemx, HAL and other software ignores one data line SDIO setting and re configures all 4 lines and thus killing UART3 (two pins shared)?

4 REPLIES 4

The F1 is VERY OLD, the design remaps pins in a block, and not individually like in newer models.

There might be a partial remap option, ie RX,TX vs RX,TX,CTS,RTS

The problem is the design, not the HAL/SPL

You can perhaps play tetris with the mapping/re-mapping to deconflict the pins, I moved on to better designed parts as soon as they came out.

For debug perhaps use SWO (PB3) to facilitate a serial debug channel, it's predominantly output, but there are input methods too, used them on Keil

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LLeva.1
Associate III

I know F1 is old, but when you have hundreds of chips, you need to use them...

If it was 2 or 4 data lines, then Yes, it is conflict. But when using 1 data line there is no visible conflicts. And CubeMX does not have any problems and warnings designing the pinout.

I still seraching for the work around, but still no result.

The UART3 is not only for debug, it is RS485 network. I just tap to it for debug. So, it is not only debug problem, but SDIO locks the main program features.

May be it is the hardware problem in the current PCB. Need to test with other. Or...

Somewhere I have fake or cloned chips from the Gigadevices, GD32F303VGT6. It is "100% compatible" with the original one. If it will work, I can state, that the original chip is buggy.

Which pins?

Read out and check/post content of SDIO and relevant GPIO, AFIO, UART registers content.

Read the SDIO with USART3 remapped and UART4 erratum.

JW

LLeva.1
Associate III

So... UART3 pins (RX, TX) located PC10,PC11 are completely locked after SDIO operation. I can not enable them again. Only reboot.

Moved RX, TX to alternative location PD8, PD9 and UART3 (USART3) is working fine. God bless Kynar wire.

Thanks JW !

This is from erratum:

When SDIO is configured in 1-bit mode, there are conflicts with the USART3_TX pin remapped and with the

UART4_TX pin. Conflicts are between the following signals:

• USART3_TX and SDIO_D2

• UART4_TX and SDIO_D2

It would be nice, that CubeMX could show this note. It may save some time. For me, at least- 3 days.