2013-01-07 09:22 AM
Recently I have implemented small educational project on STM32F4Discovery board. It takes sound from on-board MP45DT02 MEMS microphone. Unfortunately the libPDMFilter does not have the source code. Besides it looks like having IIR implementation which I also don't like. So I have implemented small and efficient FIR filter which works fine for me. It may be easily customized if you don't like default 8kHz cutoff - see attachment.
Regards, Oleg. #pdm-pcm-conversion-audio-embedde #mp45dt022013-09-03 01:05 AM
Hi Oleg,
Very interesting. In terms of using the filter is it simply a matter of calling pdm_fir_flt_put() on the incoming stream and calling pdm_fir_flt_get() at the required PCM sampling frequency? Have you any information on the kind of filtering this FIR provides? (Does it run a low pass on the incoming PDM?) Also this is my first time working with PDM (in the embedded world I've always worked on PCM and compressed verisons of PCM). Do you know of any (preferably free!) tools to generate a hex file in PDM. That way I could generate a simulated input source and run your algorithm on a PC for example to tweak it if necessary (filter values etc). Thanks for your help Ciarán2013-09-04 05:14 AM
Heya guys,
I also need to do a little of PDM work and had no clue what that is before I started :). I might actually use Oleg's filter later. Btw, perhaps this link may be of help to you if you want to generate a PDM for testing: http://dlbeer.co.nz/articles/pdm.html2017-05-03 02:33 AM
to_deletejmazura
‌Thanks a lot !
I am new to filtering and signal processing.
I have certain doubts, could you clear them up?
The application I am working works in ultrasonic range, upto 80kHz, signal I need to process, so I need to sample atleast at 160kHz, I have setup my board to generate 4.8 MHz clock to interface it with the mic ( PDM output, max clock frequency 4.8MHz )
I have never worked with PDM signals before, but have some experience with PCM,
so in order to have frequency component upto 80kHz
Fs must be atleast 160kHz
since I am providing a clock of 4.8MHz and collecting 16 samples to make up a word
Now I have 16 bits word at 4.8MHz/16 = 300kHz
So in order to have PCM signals upto 80kHz I need to decimate it by a factor of 2 ?
since sampling frequency must be atleast twice 80kHz desired,
therefore fs = 80kHz*2 = 160kHz,
and M = 300kHz/160kHz = 1.875 ? ( Decimation Factor )
So basically by decimating by a factor of 2 I will be able to capture frequencies upto 75kHz ?
And in the code provided by you
You are generating the kernel or coefficients using the python script pdm_fir.py
What changes do I need to make in this file for my requirement and in other files?
PDM_FTL_TAPS = 16 --> should I increase it or decrease it
PDM_FTL_SAMPLE_F = 1024 --> PDM_FTL_SAMPLE_F = 4800 ( clk frequency in kHz ? )PDM_FTL_CUT_OFF = 8 --> PDM_FTL_CUT_OFF = 100 PDM_FTL_SCALE_BITS = 30 --> What's this ?How do I decide these parameters?
Any thumb rules?
What should be the optimum number of taps and how do you calculate number of sample
I have interfaced the mems mic using I2S on STM32F407-DISCOVERY board and the mic I am using has frequency range upto 80kHz
Any help is really appreciated
Thanks & regards
Farhan Khan
2017-05-06 12:40 AM
Any help from anyone any comments !!!!!!!!!!!!
2017-05-06 07:23 AM
You are kicking a four year old thread, with content migrated from the prior forum. The OP is not a current forum member, might have a different email now, and most likely didn't get an alert that the thread was posted against.
2017-05-06 07:26 AM
I am just trying my luck, if someone has worked on this, knows something about and maybe point me in the right direction
2017-05-06 04:27 PM
Understood, you should probably thoroughly review the code as provided, understand that configuration and discuss with teacher/tutor. I suspect Oleg is probably find-able on the net with a little sleuthing.
https://github.com/olegv142/pdm_fir