2024-04-22 06:37 AM
Hello STM community,
I'm working on optimizing SPI communication on an STM device, and I'm encountering an issue with the timing of SCLK pulses. After transmitting 16 SCLK pulses, there's a delay of 3μs before the next set of 16 pulses can be generated.
I need to reduce this delay to ensure that SCLK can be immediately generated after CS goes low. Can anyone suggest methods or configurations to minimize this delay and maintain a continuous SCLK stream after CS is pulled low?
I'm trying to achieve sampling rate for ADC ADS7046 interfacing.
sclk take same time even not used CS.
I want to sclk immediately on after cs low.
Below I attach some snap of spi cycle.
2024-04-22 06:40 AM
Use DMA.
JW
2024-04-22 06:44 AM
Start by using the FIFO.
2024-04-22 06:48 AM
If you need the framing with CS, read the reference and understand how NSS can be used to automaitcally generate the frame around a packet.
2024-04-22 09:50 PM - edited 2024-04-22 09:51 PM
Hello Uwe Bonnes,
Thanks for reply. I also used DMA with normal mode then frame also same as above with additional delay. So then I am trying with circular DMA that time data not read as given. and SCLK generated continuous and cs not toggle. please can you provide one example code with stm32h745 SPI DMA. I want to achieve 3msps sampling rate for ADC ads7046.
2024-04-23 01:36 AM
The timing above does not look like hardware NSS. When using hardware NSS the timing between NSS and clock and between transfers is set by SPI_CFG2_MIDI and MSSI. HAL will probably have a way to set hardware NSS and those values, adding however a level of obfuscation between the reference manual and theseetings needed by HAL
2024-04-23 02:39 AM - edited 2024-04-23 02:40 AM
yes Uwe Bonnes, can you please provide example code and setting what to do. and which mode i need to select normal or circular dma?
2024-04-23 02:44 AM
I do not use HAL
2024-04-23 03:30 AM
it's ok. can you share it. any type of example you can share.
now i used with hardware nss
blue= sclk, red= nss
how can i minimize sclk time
without buffer print it also take same time.
2024-04-23 03:38 AM