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I2C. address is not transmitted after START condition

FSky.1
Associate II

Hi, I'm trying to write i2c ISR by myself with LL. But after START condition address don't transfer(I see it in my oscilloscope), although I write to I2C1->DR address of slave and read reference manual with attention for proper handling.

I generate initialization code with CubeMX, so there should not be errors in this part.

Here's my code of freertos task:

oid i2cLCD(void *arg) { // just FreeRTOS task
    while (1) {
        // wait for button to be pressed
        xEventGroupWaitBits(btnE, BUTTON_TASK_BIT, pdTRUE, pdTRUE, portMAX_DELAY);
        //enable i2c event interrupt
        LL_I2C_EnableIT_EVT(I2C1);
        // generate start condition
        LL_I2C_GenerateStartCondition(I2C1);
        //wait for transfer to complete
        xEventGroupWaitBits(btnE, I2C_TASK_BIT, pdTRUE, pdTRUE, portMAX_DELAY);
        i2c_data = i2c_data ^ 0xff;
    }
}

Here's code of ISR:

void I2C1_EV_IRQHandler(void)
{
    static BaseType_t wake = pdFALSE;
 
    if (I2C1->SR1 & I2C_SR1_SB) {
        I2C1->DR = 0x4e; //address of pcf8574
        return;
    }
    if (LL_I2C_IsActiveFlag_ADDR(I2C1)) {
        LL_I2C_TransmitData8(I2C1, 0xff);
        LL_I2C_ClearFlag_ADDR(I2C1);
        return;
    }
    if (LL_I2C_IsActiveFlag_BTF(I2C1)) {
        LL_I2C_GenerateStopCondition(I2C1);
        xEventGroupSetBitsFromISR(btnE, I2C_TASK_BIT, &wake);
        return;
    }
}

As I said, on SCL line I see falling edge and no pulses. On SDA nothing occurs - high level remains. I tried debugging - interrupt really occurs and condition on 5th line of code passes and 6th line executes. After that interrupt don't want to fire anymore and address just doesn't get transmitted. Maybe somebody encountered this kind of error? I'm trying to follow reference manual precisely, but can't get result. Thank you in advance!

5 REPLIES 5
S.Ma
Principal

For safety, before generating a START bit, check that both SDA and SCL are high level.

If they don't, put a NOP breakpoint to catch this bus anomaly.

AScha.3
Chief II

> As I said, on SCL line I see falling edge and no pulses. On SDA nothing

thats totally wrong. or exchange scl-sda ...

first is : falling edge sda = start . then...pulse scl ...

0693W00000YA10NQAT.png

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This pins are pulled up. How they can go low before start condition?

Ye, you're alright. Start condition don't wanna generate due to unknown reason. Gonna figure it out.

FSky.1
Associate II

Guys, you are not gonna believe! I've just set i2c address of my device and now it just works. It seems like stm's i2c controller dont bother it runs as master. It craves address of slave anyway lol. Is this bug in stm32 microcontrollers? It said nowhere about it0693W00000YA5EZQA1.png