2023-06-22 07:21 AM
Hi, I'm using the UART on a STM32G071 MCU. To read data get an interrupt when the FIFO reach the FIFO reaches the threshold of 1/2.
Inside the interrupt routine I check if there are uart errors.
If I get some errors I want to discard data received. Before quit from the interrupt routine I want to empty the FIFO reading all the bytes received. I didn't find any bit on UART registers that indicate that FIFO si completely empty. Can you help me? Is there any other way to get the FIFO empty?
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2023-06-22 07:59 AM - edited 2023-06-22 08:00 AM
I am not familiar with the new UART with FIFO, but according to RM0444, there are two separate flags for Rx FIFO threshold reached (RXFT) and Rx FIFO not empty (RXFNE). The latter should suffice to be able to purge the FIFO.
Also, setting RXFRQ should flush the whole FIFO at once.
JW
2023-06-22 07:59 AM - edited 2023-06-22 08:00 AM
I am not familiar with the new UART with FIFO, but according to RM0444, there are two separate flags for Rx FIFO threshold reached (RXFT) and Rx FIFO not empty (RXFNE). The latter should suffice to be able to purge the FIFO.
Also, setting RXFRQ should flush the whole FIFO at once.
JW
2023-06-25 02:04 PM
Thank you very much for your reply. Now I use RXFNE to check if fifo is empty, then I flush the content using RXFRQ as you suggest. During debug of my code I send 8 byte to the uart.The fifo is 8 byte length. I get an interrupt when the fifo reaches 1/2 threshold.
I break the execution inside the interrupt routine and going step by step I see that RDR register gets the bytes stored in the fifo. This without making an explict reading of RDR register. Is it a normal behavior?Is there some configuration to avoid this? I expect that if I don’t read the RDR register the bytes received remains in the fifo.
2023-06-25 02:07 PM
> This without making an explict reading of RDR register.
If you observe RDR in debugger, that's the same as reading it in code. Debugging is intrusive.
JW