How to align lwIP driver Rx data buffers to cache line size
Options
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Email to a Friend
- Report Inappropriate Content
2020-07-14 5:08 AM
tcpip thread message fetch is not working in lwIP if caches enabled in STM32F767.
How to align lwIP driver Rx data buffers to cache line size.
Labels:
- Labels:
-
Ethernet
-
STM32F7 Series
This discussion is locked. Please start a new topic to ask your question.
0 REPLIES 0
