FreeRtTOS Timers running slow on custom board

[barry]

Posted on December 05, 2014 at 05:20

FreeRTOS on Discovery board  one tick = 1 msec

FreeRTOS on custom board  one tick = 10 msec   (same code as running on Discovery Board)Uart code Interrupt driven  runs on both boards ADC/DMA Interrupt driven code runs on both boardsWhere is the setup for external crystal vs. internal oscillator?Would this explain the factor of 10 slower ticks?If not, what do I change?    Just some FreeRTOS parameters?Would this affect the operation of GPIO pins?Thanks #freertos #stm32f407-discovery

[frankmeyer9]

Posted on December 05, 2014 at 13:11

How is the custom board clocked ?

Has it an external crystal at all ? Take such a custom board, and debug into the SystemInit function. I guess it fails to set up the PLL properly, and falls back to the HSI (without PLL).

[Tesla DeLorean]

Posted on December 05, 2014 at 14:53

10x, sounds like 16 MHz (HSI) vs 168 MHz (PLL)

Would check that HSE is starting, and output internal signal via MCO (PA8) to confirm. There's a bit indicated it started, and also if the PLL has locked. The code in system_stm32f4xx.c via SystemInit() sets up the HSE/HSI depending on implementation, and starts the PLL with parameters as specified. The fail over would be to continue running from HSI, the code could be made more robust, by for example using HSI as a source to the PLL if the HSE doesn't start or is not present.

[barry]

Posted on December 05, 2014 at 22:41

I cannot find stm32f4xx_Clock_Configuration_V1

.

0.0

.

xls which was used to create SystemInit()

Cube...  generates different code, and I started with different code examples because Cube... didn't work and the HAL examples didn't work for me.I am not using an external crystal (HSE?), but I don't know what exactly to change.Thanks for your help

[barry]

Posted on December 05, 2014 at 22:50

I found a later version stm32f4xx_Clock_Configuration_V1.0.1.xls

Is this no longer supported by ST?I'll give it a try if I can figure out how to use it.Is  the current version of  CubeMX  etc.  working better than the original release?

[Tesla DeLorean]

Posted on December 05, 2014 at 22:57

Yeah, I'm not sure I've ever needed an Excel sheet to compute a handful of gear ratios.

http://www.st.com/web/en/catalog/tools/FM147/CL1794/SC961/SS1533/PF257927

Your goal would be to modify the defines in system_stm32f4xx.c so that PLL_M is 16, and PLL_SOURCE_HSI is set. This would depend on the versions of the library you're pulling. I'm not using HAL/CUBE so can't help you with that.

...
/************************* PLL Parameters *************************************/
/* Select the PLL clock source */
#define PLL_SOURCE_HSI // HSI (~16 MHz) used to clock the PLL, and the PLL is used as system clock source
//#define PLL_SOURCE_HSE // HSE (8MHz) used to clock the PLL, and the PLL is used as system clock source
//#define PLL_SOURCE_HSE_BYPASS // HSE bypassed with an external clock (8MHz, coming from ST-Link) used to clock
// the PLL, and the PLL is used as system clock source
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N */
#if defined (PLL_SOURCE_HSI)
#define PLL_M 16
#else
#define PLL_M 8
#endif
#define PLL_N 336
/* SYSCLK = PLL_VCO / PLL_P */
#define PLL_P 2
/* USB OTG FS, SDIO and RNG Clock = PLL_VCO / PLLQ */
#define PLL_Q 7
/******************************************************************************/
...
#if defined (PLL_SOURCE_HSI)
uint32_t SystemCoreClock = (((HSI_VALUE / PLL_M )* PLL_N) / PLL_P);
#else
uint32_t SystemCoreClock = (((HSE_VALUE / PLL_M )* PLL_N) / PLL_P);
#endif
...
/**
* @brief Configures the System clock source, PLL Multiplier and Divider factors,
* AHB/APBx prescalers and Flash settings
* @Note This function should be called only once the RCC clock configuration
* is reset to the default reset state (done in SystemInit() function).
* @param None
* @retval None
*/
static void SetSysClock(void)
{
/******************************************************************************/
/* PLL (clocked by HSE) used as System clock source */
/******************************************************************************/
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
#ifdef PLL_SOURCE_HSI
/* Configure the main PLL */
RCC->PLLCFGR = PLL_M | (PLL_N << 
6
) | (((PLL_P >> 1) -1) << 
16
) |
(RCC_PLLCFGR_PLLSRC_HSI) | (PLL_Q << 24);
#else /* PLL_SOURCE_HSE_BYPASS or PLL_SOURCE_HSE */
/* Enable HSE */
RCC->CR |= ((uint32_t)RCC_CR_HSEON);
#ifdef PLL_SOURCE_HSE_BYPASS
/* Enable HSE */
RCC->CR |= ((uint32_t)RCC_CR_HSEBYP);
#endif /* PLL_SOURCE_HSE_BYPASS */
/* Wait till HSE is ready and if Time out is reached exit */
do
{
HSEStatus = RCC->CR & RCC_CR_HSERDY;
StartUpCounter++;
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
if ((RCC->CR & RCC_CR_HSERDY) != RESET)
{
HSEStatus = (uint32_t)0x01;
}
else
{
HSEStatus = (uint32_t)0x00;
}
if (HSEStatus == (uint32_t)0x01)
{
/* Configure the main PLL */
RCC->PLLCFGR = PLL_M | (PLL_N << 
6
) | (((PLL_P >> 1) -1) << 
16
) |
(RCC_PLLCFGR_PLLSRC_HSE) | (PLL_Q << 24);
}
else
{ /* If HSE fails to start-up, the application will have wrong clock
configuration. User can add here some code to deal with this error */
}
#endif /*PLL_SOURCE_HSI*/

/* Enable high performance mode, System frequency up to 168 MHz */ RCC->APB1ENR |= RCC_APB1ENR_PWREN; PWR->CR |= PWR_CR_PMODE;

/* HCLK = SYSCLK / 1*/
RCC->CFGR |= RCC_CFGR_HPRE_DIV1;
/* PCLK2 = HCLK / 2*/
RCC->CFGR |= RCC_CFGR_PPRE2_DIV2;
/* PCLK1 = HCLK / 4*/
RCC->CFGR |= RCC_CFGR_PPRE1_DIV4;
/* Enable the main PLL */
RCC->CR |= RCC_CR_PLLON;
/* Wait till the main PLL is ready */
while((RCC->CR & RCC_CR_PLLRDY) == 0)
{
}
/* Configure Flash prefetch, Instruction cache, Data cache and wait state */
FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
/* Select the main PLL as system clock source */
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
RCC->CFGR |= RCC_CFGR_SW_PLL;
/* Wait till the main PLL is used as system clock source */
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
{
}
}

The HSI clock is already running when the part starts, so just a matter of configuring the PLL and waiting for it to lock.

[barry]

Posted on December 09, 2014 at 23:58

Clive,

Thanks the new spreadsheet, your example and a couple of good guesses did the trick.Barry