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Ethernet problems @ 10Mbit/s half duplex with STM32F207IG and KSZ8863RLL PHY.

damien239955_st
Associate
Posted on April 05, 2013 at 14:13

Hello everyboby,

I'm using KSZ8863RLL chip from Micrel as Ethernet PHY, with STM32F207IG in RMII mode.

50 MHz Clock reference is sourced externally by an oscillator.

PHY registers are accessed through SMI (with ETH_MACMIIAR and ETH_MACMIIDR registers). This interface is known as MIIM or MDIO interface on PHY's side.

Moreover, I'm using uC/OS-III with uC/TCP-IP stack.

I'm facing issues in 10 Mbit/s half duplex configuration, whereas everything is working well in 100 Mbit/s full duplex.

I can communicate at any time with PHY registers. The PHY auto-negotiation detects well the 10 Mbit/s network, PHY's status registers are correctly set (10 half capable). That information is properly recovered by STM32 which configures consequently FES and DM bits of ETH_MACCR. From this point, no DMA Rx IT is occuring anymore, whereas it's correctly happening in 100 Mbit/s.

I have reset ROD bit (Receive own disable) in ETH_MACCR, but my issue is still present.

I have checked every configuration registers, IT mask registers, and everything is looking fine.

I have scoped TXD and RXD, and it seems to be traffic on it, even if I'm not a specialist of RMII protocol.

I'm quite disappointed, I can't even determinate if that problem come from STM32 side, PHY side, or other reason like clock source.

I have looked for similar issue on STe2eCommunities without any success...

Has someone maybe a lead to follow ?

Thanks in advance,

Best regards,

Damien

#stm32f207-ethernet-rmii-10-half
15 REPLIES 15
damien239955_st
Associate
Posted on April 09, 2013 at 14:47

Hello,

For anybody facing that issue, I've found the cause of it.

Actually KSZ8863RLL is an Ethernet switch, embedding MAC and PHY layers, with three ports. 1 and 2 (MAC+PHY) connected to network, 3 (MAC only), connected to the STM32 through RMII.

Whatever the speed detected on port 1 and 2, ETH_MACCR  register must remain 100 Mbits/s full duplex parameters. Otherwise MACTXCLK and MACRXCLK are reduced from 25 MHz to 2.5 MHz (as described in reference manual), and thus STM32 MAC's layer is not able to communicate with PHY's port 3 anymore...

Best regards,

Damien

whwong84
Associate II
Posted on September 29, 2013 at 09:27

Hi Damien,

Currently I am working on STM32F217 interface with KSZ8863RLL. I have read through the datasheet of KSZ8863RLL, and they are using SMI to communicate, whereby it uses the same opcode (0x00) for read and write KSZ8863RLL registers, but it seems that there's no option in STM32F217 to select the option for opcode. Can you share how you make your STM32 to communicate with KSZ8863RLL?

Many thanks in advance.

Thanks and Best Regards,

WH Wong

grant
Associate III
Posted on September 16, 2014 at 11:16

Hi There

I am using am STM32F207 with the KSZ8863RLL and had to bit bash the SMI port to make it work due to the non standard read/write op code.  If this thread is still valid and anyone is interested, I can publish the code.

Cheers

Grant

Posted on September 16, 2014 at 16:37

If this thread is still valid and anyone is interested, I can publish the code.

People often stubble on to things here, so I'd recommend you provide some contact details, perhaps via your profile, or link to a blog or Google+ page so they can find you.

Illustrating how things might be done in this case might also help others in slightly different cases, so if you're game, post enough code to demonstrate your solution.

Tips, Buy me a coffee, or three.. PayPal Venmo
Up vote any posts that you find helpful, it shows what's working..
grant
Associate III
Posted on September 20, 2014 at 09:48

Thanks Clive - thanks for the tip.  I am new here, so please bear with me learning how this forum works :)

I have actually made some more progress on this issue so will share the results here.  

There is a bit of a confusing nomenclature issue between the KSZ datasheet and that used in the STM32F207 reference manual.

Section 28.4.1 in the STM32F207 reference manual describes the Station Management Interface or SMI. This uses MDC and MDIO for accessing the PHY registers and as described in Table 139 uses Operation = 10 for read and Operation = 01 for write.

This is what the KSZ refers to as the MII Management (MIIM) Interface which is specified on p32 of the datasheet (Jan 27,2014) and this ''complies with the IEEE 802.3 MII Management Interface, also know as the Management Data Input/Output (MDIO) Interface''.

I have found that this works fine and I can happily read and write to the PHY registers available under this interface.

The KSZ8863 has another ''non standard'' mode which it calls Serial Management Interface (''SMI'') and this has the Read/Write Op Code stuck at 00 for both read and write cycles as per p33 of the KSZ8863 datasheet. It also provides access through 8 bit registers only.  You can access the same registers using this mode that you can using MIIM, but there are more registers such as those used to adjust the switch management settings.  I had to write a bit bash method to implement this form of SMI as the SMT32F207 Read/Write Op code cannot be changed.

The whole things of having two protocols that have the same acronym (SMI), but are not the same (albeit slightly different) is definitely confusing and this got me at first.  After having written a bit bash (KSZ)SMI method, I discovered this and now just use the standard MIIM mode.  Once I had the MIIM interface going I found it was all I needed as I don't do anything crazy with the switch.

A few other points I found out along the way while getting this going:

- You need to have p39 of the KSZ8863 SPISN pulled up

- p45 and p46 (P2LED1/0) need to be pulled high too (you can use the internal pull ups)

Hope this helps.

Regards

Grant

gosturnca
Associate
Posted on February 25, 2015 at 23:00

Hi Grant.

I am working on SMI for KSZ8863. I have a working bitbang code, so I can

read/write registers but the network interface does not work.

Are you still keen to help or share the bits?

Regards,

Klemen

grant
Associate III
Posted on April 05, 2015 at 09:25

Hi there

Sorry for the delay in getting back.  I thought I had the notifications set to email me but clearly I still have something set wrong :\

I have the KSZ8863RLL working with RMII but I have modified quite a few things.  What exactly are you having trouble with?

Regards

Grant

gino
Associate II
Posted on April 09, 2015 at 11:37

Hi.

it seems I'm facing a similar issue like Sladic.Klemen.

I would have a working stack(fnet). Also I'm able to read/write registers, but I get no connection.

As far as I understand, without any software at port 3 the switch should work after power up and setting RSTN high.

But when I only test the switch function between Port1 and Port2 it does not work. All LEDs are off. Is there any register which default values don't allow immediate switching function after power up?

Best regards
sammerman
Associate
Posted on May 27, 2015 at 22:20

I am also having this trouble. I can write registers and I can see that the Micrel recognizes that it is linked, but there is nothing getting back to the ST. Could it be the issue with the SPISN pin that was mentioned?

Also, could one of you gentlemen with working SMI bitbang code please post it? Thanks!