Ethernet problems @ 10Mbit/s half duplex with STM32F207IG and KSZ8863RLL PHY.

[damien239955_st]

Posted on April 05, 2013 at 14:13

Hello everyboby,

I'm using KSZ8863RLL chip from Micrel as Ethernet PHY, with STM32F207IG in RMII mode.50 MHz Clock reference is sourced externally by an oscillator.PHY registers are accessed through SMI (with ETH_MACMIIAR and ETH_MACMIIDR registers). This interface is known as MIIM or MDIO interface on PHY's side.Moreover, I'm using uC/OS-III with uC/TCP-IP stack.I'm facing issues in 10 Mbit/s half duplex configuration, whereas everything is working well in 100 Mbit/s full duplex.I can communicate at any time with PHY registers. The PHY auto-negotiation detects well the 10 Mbit/s network, PHY's status registers are correctly set (10 half capable). That information is properly recovered by STM32 which configures consequently FES and DM bits of ETH_MACCR. From this point, no DMA Rx IT is occuring anymore, whereas it's correctly happening in 100 Mbit/s.I have reset ROD bit (Receive own disable) in ETH_MACCR, but my issue is still present.I have checked every configuration registers, IT mask registers, and everything is looking fine.I have scoped TXD and RXD, and it seems to be traffic on it, even if I'm not a specialist of RMII protocol.I'm quite disappointed, I can't even determinate if that problem come from STM32 side, PHY side, or other reason like clock source.I have looked for similar issue on STe2eCommunities without any success...Has someone maybe a lead to follow ?Thanks in advance,Best regards,Damien #stm32f207-ethernet-rmii-10-half

[Marco Secondini]

Posted on March 13, 2017 at 12:41

I've started to work with this Micrel switch, and I'm finding the same problems because to set the port 3 in MAC mode I have to write to address 53 through the modified SMI interface. I've not found any method to change the OPCodes to the requested '00', so I'm stuck ...

it could be very helpful if someone who solved this problem could post C code for SMI interface.

[Tesla DeLorean]

Posted on August 21, 2017 at 17:14

Can't say it was, but Grant did post a description below. The forum software has changed in the intervening years so not sure the account is still valid or viable.  You could try sending a PM to Grant, I don't have access to account info, don't work for ST.

[ikozak]

Posted on September 19, 2017 at 11:40

Hi,

We also for with STM32F207 and KSZ8863RLL . We read&write KSZ registers using bit-bang. But I need example schematic and source code to work it properly. if you share your code , we appreciate.

Regards

ilkay KOZAK

[Micha? Pe?ka]

Posted on March 27, 2018 at 01:30

At this moment I am very intrested in details, including code for that switch.

[BPadm]

We are interfacing STM32F417ZGT6 (MCU) with KSZ8863RLL (PHY) over RMII.

Issue:

We have the MDC pin stuck low at 0V, at the MCU with the data pin toggling (the required format for MDIO) as expected.

Hints:

1.      The MDC is not short to ground ,VCC or adjacent pins (Sanity Check)

2.      There is continuity between MCU & PHY in PCB(Sanity Check)

3.      We have set the (ETH_MACMIIAR) Bit 4 to 2 to 100 .(This is by default set by Cube)

4..      The MDIO has Pullup on the bidirectional Line and MDC is output from MCU to PHY

8.      And the datasheet says this on MDC pin . When is the IDLE State condition possible?

Can you help me on this to get the MDC working?

Please see the attachment for the configuration snap shot

[Tesla DeLorean]

This is a five year old thread for a different processor using a different library, can we please use some common sense and open a NEW thread, and cite this one if it relates at all at this point. Thanks.

If you are a commercial customer consider also contacting the FAE supporting your account.