Enable ARP Offload on STM32H745

[Jiahong]

Hi,

I try to enable the hardware ARP Offload in a STM32H745. The problem is, that it doesn't take the given IP adresse in die MACARPAR register regardless what the sequence of code is. I tryed it before and after enabling the ARPEN bit and before and after start the ETH. The adresse where the MACARAR register is, is staying at zero. Does anybody know, how to enable the ARP offload?

Here is my code and debug phenomenon：

  // Enable ARP offload
  MODIFY_REG(heth.Instance->MACCR, ETH_MACCR_ARP, 1U << ETH_MACCR_ARP_Pos);

  // Set ARP protocol address
  MODIFY_REG(heth.Instance->MACARPAR, ETH_MACARPAR_ARPPA, htonl(0xC0A8000DUL));

Best regards,

JIahong

[STea]

Hello @Jiahong ,

Can you share with us some details about the software and hardware configuration used for this context.

are you using a nucleo or disco or custom board?

are you using LWIP FreeRtos or you are working without networking stack and Rtos ?
if you are using Lwip the Feature of ARP offload is already implemented and you can see a working example in this link (see sections with #if LWIP_ARP in ethernetif.c)  
Regards

[Jiahong]

Hi @STea ,

Thanks for your reply. I use custom board and the hal driver version is v1.10.0. And I am implementing the udp protocol without the rtos and the lwip.

I call the HAL_ETH_ReadData() directly to get the ethernet frame and parse the udp payload by myself, and sending is similar. 

Here is my Init function:

void MX_ETH_Init()
{
  static uint8_t MACAddr[6];

  heth.Instance = ETH;
  MACAddr[0] = 0x00;
  MACAddr[1] = 0x80;
  MACAddr[2] = 0xE1;
  MACAddr[3] = 0x00;
  MACAddr[4] = 0x00;
  MACAddr[5] = 0x00 + read_address();
  heth.Init.MACAddr = &MACAddr[0];
  heth.Init.MediaInterface = HAL_ETH_MII_MODE;
  heth.Init.TxDesc = DMATxDscrTab;
  heth.Init.RxDesc = DMARxDscrTab;
  heth.Init.RxBuffLen = ETH_RX_BUFFER_SIZE;

  // Init PHY 
  HAL_GPIO_WritePin(ENETRST_N_Port, ENETRST_N_Pin, GPIO_PIN_SET);  

  if (HAL_ETH_Init(&heth) != HAL_OK)
  {
    Error_Handler();
  }

  memset(&TxConfig, 0 , sizeof(ETH_TxPacketConfig));
  TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM;
  TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC;
  TxConfig.CRCPadCtrl = ETH_CRC_INSERT;

  // Get MAC Config MAC
  ETH_MACConfigTypeDef MACConf = {0};
  HAL_ETH_GetMACConfig(&heth, &MACConf);
  MACConf.DuplexMode = ETH_FULLDUPLEX_MODE;
  MACConf.Speed = ETH_SPEED_100M;
  HAL_ETH_SetMACConfig(&heth, &MACConf);

  // Set the MAC filter to reject sendor MAC adderss: 00-08-e1-xx-xx-xx
  HAL_ETH_GetMACFilterConfig(&heth, &MacFilterConfig);
  MacFilterConfig.SrcAddrFiltering = ENABLE;
  MacFilterConfig.SrcAddrInverseFiltering = ENABLE;
  HAL_ETH_SetMACFilterConfig(&heth, &MacFilterConfig);

  // Config the ETH_MAC_ADDRESS1 register
  // Enable source filter
  MODIFY_REG(heth.Instance->MACA1HR, ETH_MACA1HR_AE, 1U << ETH_MACA1HR_AE_Pos);
  MODIFY_REG(heth.Instance->MACA1HR, ETH_MACA1HR_SA, 1U << ETH_MACA1HR_SA_Pos);
  // Config mac address
  MODIFY_REG(heth.Instance->MACA1HR, ETH_MACA1HR_ADDRHI, MACAddr[5] << 8U | MACAddr[4]);
  MODIFY_REG(heth.Instance->MACA1LR, ETH_MACA1LR_ADDRLO, *((uint32_t*)(MACAddr)));
  // Config mask to check the 3 MSB
  MODIFY_REG(heth.Instance->MACA1HR, ETH_MACA1HR_MBC, 7U << (ETH_MACA1HR_MBC_Pos + 3U));

  MODIFY_REG(heth.Instance->MACHWF0R, ETH_MACHWF0R_ARPOFFSEL, ETH_MACHWF0R_ARPOFFSEL);
  MODIFY_REG(heth.Instance->MACCR, ETH_MACCR_ARP, 1U << ETH_MACCR_ARP_Pos);
  MODIFY_REG(heth.Instance->MACARPAR, ETH_MACARPAR_ARPPA, htonl(0xC0A8000DUL));

  HAL_ETH_Start_IT(&heth);
}

[STea]

Hello @Jiahong ,

did you manage to solve this issue.

my recommendation is to have incremental changes out of the MX_eth_init function 
this sequence is not described in RM so it could be the one causing

  HAL_ETH_GetMACFilterConfig(&heth, &MacFilterConfig);
  MacFilterConfig.SrcAddrFiltering = ENABLE;
  MacFilterConfig.SrcAddrInverseFiltering = ENABLE;
  HAL_ETH_SetMACFilterConfig(&heth, &MacFilterConfig);

  // Config the ETH_MAC_ADDRESS1 register
  // Enable source filter
  MODIFY_REG(heth.Instance->MACA1HR, ETH_MACA1HR_AE, 1U << ETH_MACA1HR_AE_Pos);
  MODIFY_REG(heth.Instance->MACA1HR, ETH_MACA1HR_SA, 1U << ETH_MACA1HR_SA_Pos);
  // Config mac address
  MODIFY_REG(heth.Instance->MACA1HR, ETH_MACA1HR_ADDRHI, MACAddr[5] << 8U | MACAddr[4]);
  MODIFY_REG(heth.Instance->MACA1LR, ETH_MACA1LR_ADDRLO, *((uint32_t*)(MACAddr)));
  // Config mask to check the 3 MSB
  MODIFY_REG(heth.Instance->MACA1HR, ETH_MACA1HR_MBC, 7U << (ETH_MACA1HR_MBC_Pos + 3U));

  MODIFY_REG(heth.Instance->MACHWF0R, ETH_MACHWF0R_ARPOFFSEL, ETH_MACHWF0R_ARPOFFSEL);
  MODIFY_REG(heth.Instance->MACCR, ETH_MACCR_ARP, 1U << ETH_MACCR_ARP_Pos);
  MODIFY_REG(heth.Instance->MACARPAR, ETH_MACARPAR_ARPPA, htonl(0xC0A8000DUL));

Regards