ADC in DMA circular mode with LL Library Problems

[arge2]

int loopTime = 0, maxLoopTime = 0;

/* Private function prototypes -----------------------------------------------*/

void SystemClock_Config(void);

int main(void)

{

  /* MCU Configuration--------------------------------------------------------*/

  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */

  HAL_Init();

  /* Configure the system clock */

  SystemClock_Config();

  /* Initialize all configured peripherals */

  MX_GPIO_Init();

  MX_DMA_Init();

  MX_ADC1_Init();

  MX_ADC2_Init();

  MX_COMP1_Init();

  MX_COMP2_Init();

  MX_COMP4_Init();

  MX_DAC3_Init();

  MX_OPAMP1_Init();

  MX_OPAMP2_Init();

  MX_OPAMP3_Init();

  MX_TIM1_Init();

  MX_IWDG_Init();

  MX_I2C3_Init();

  /* USER CODE BEGIN 2 */

  SystemManager_Start();

  /* USER CODE END 2 */

  /* Infinite loop */

  /* USER CODE BEGIN WHILE */

  while (1)

  {

    /* USER CODE END WHILE */

    /* USER CODE BEGIN 3 */

LL_IWDG_ReloadCounter(IWDG);

SystemManager_Task();

static uint64_t _t = 0;

loopTime = HAL_GetTick_us()-_t;

_t = HAL_GetTick_us();

if(HAL_GetTick() > 5000 && loopTime > maxLoopTime)

maxLoopTime = loopTime;

  }

  /* USER CODE END 3 */

}

/**

  * @brief System Clock Configuration

  * @retval None

  */

void SystemClock_Config(void)

{

  LL_FLASH_SetLatency(LL_FLASH_LATENCY_4);

  while(LL_FLASH_GetLatency() != LL_FLASH_LATENCY_4)

  {

  }

  LL_PWR_EnableRange1BoostMode();

  LL_RCC_HSE_Enable();

   /* Wait till HSE is ready */

  while(LL_RCC_HSE_IsReady() != 1)

  {

  }

  LL_RCC_LSI_Enable();

   /* Wait till LSI is ready */

  while(LL_RCC_LSI_IsReady() != 1)

  {

  }

  LL_RCC_HSE_EnableCSS();

  LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE, LL_RCC_PLLM_DIV_6, 85, LL_RCC_PLLR_DIV_2);

  LL_RCC_PLL_EnableDomain_SYS();

  LL_RCC_PLL_Enable();

   /* Wait till PLL is ready */

  while(LL_RCC_PLL_IsReady() != 1)

  {

  }

  LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);

  LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_2);

   /* Wait till System clock is ready */

  while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)

  {

  }

  /* Insure 1us transition state at intermediate medium speed clock*/

  for (__IO uint32_t i = (170 >> 1); i !=0; i--);

  /* Set AHB prescaler*/

  LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);

  LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);

  LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);

  LL_SetSystemCoreClock(170000000);

   /* Update the time base */

  if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK)

  {

    Error_Handler();

  }

}

/* USER CODE BEGIN 4 */

/* USER CODE END 4 */

/**

  * @brief  Period elapsed callback in non blocking mode

  * @note   This function is called  when TIM7 interrupt took place, inside

  * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment

  * a global variable "uwTick" used as application time base.

  * @PAram  htim : TIM handle

  * @retval None

  */

void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)

{

  /* USER CODE BEGIN Callback 0 */

  /* USER CODE END Callback 0 */

  if (htim->Instance == TIM7) {

    HAL_IncTick();

  }

  /* USER CODE BEGIN Callback 1 */

  /* USER CODE END Callback 1 */

}

/**

  * @brief  This function is executed in case of error occurrence.

  * @retval None

  */

void Error_Handler(void)

{

  /* USER CODE BEGIN Error_Handler_Debug */

  /* User can add his own implementation to report the HAL error return state */

  __disable_irq();

  while (1)

  {

  }

  /* USER CODE END Error_Handler_Debug */

}

#ifdef  USE_FULL_ASSERT

/**

  * @brief  Reports the name of the source file and the source line number

  *         where the assert_param error has occurred.

  * @PAram  file: pointer to the source file name

  * @PAram  line: assert_param error line source number

  * @retval None

  */

void assert_failed(uint8_t *file, uint32_t line)

{

  /* USER CODE BEGIN 6 */

  /* User can add his own implementation to report the file name and line number,

     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */

  /* USER CODE END 6 */

}

#endif /* USE_FULL_ASSERT */

void MX_ADC1_Init(void)

{

  /* USER CODE BEGIN ADC1_Init 0 */

  /* USER CODE END ADC1_Init 0 */

  LL_ADC_InitTypeDef ADC_InitStruct = {0};

  LL_ADC_REG_InitTypeDef ADC_REG_InitStruct = {0};

  LL_ADC_CommonInitTypeDef ADC_CommonInitStruct = {0};

  LL_ADC_INJ_InitTypeDef ADC_INJ_InitStruct = {0};

  LL_GPIO_InitTypeDef GPIO_InitStruct = {0};

  LL_RCC_SetADCClockSource(LL_RCC_ADC12_CLKSOURCE_SYSCLK);

  /* Peripheral clock enable */

  LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_ADC12);

  LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);

  LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB);

  /**ADC1 GPIO Configuration

  PA0   ------> ADC1_IN1

  PA2   ------> ADC1_IN3

  PB1   ------> ADC1_IN12

  */

  GPIO_InitStruct.Pin = VCC_HV_MON_Pin;

  GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG;

  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;

  LL_GPIO_Init(VCC_HV_MON_GPIO_Port, &GPIO_InitStruct);

  GPIO_InitStruct.Pin = U_CURRENT_Pin;

  GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG;

  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;

  LL_GPIO_Init(U_CURRENT_GPIO_Port, &GPIO_InitStruct);

  GPIO_InitStruct.Pin = W_CURRENT_Pin;

  GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG;

  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;

  LL_GPIO_Init(W_CURRENT_GPIO_Port, &GPIO_InitStruct);

  /* ADC1 DMA Init */

  /* ADC1 Init */

  LL_DMA_SetPeriphRequest(DMA1, LL_DMA_CHANNEL_1, LL_DMAMUX_REQ_ADC1);

  LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_CHANNEL_1, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);

  LL_DMA_SetChannelPriorityLevel(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PRIORITY_HIGH);

  LL_DMA_SetMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MODE_CIRCULAR);

  LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PERIPH_NOINCREMENT);

  LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MEMORY_INCREMENT);

  LL_DMA_SetPeriphSize(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PDATAALIGN_HALFWORD);

  LL_DMA_SetMemorySize(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MDATAALIGN_HALFWORD);

  /* ADC1 interrupt Init */

  NVIC_SetPriority(ADC1_2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));

  NVIC_EnableIRQ(ADC1_2_IRQn);

  /* USER CODE BEGIN ADC1_Init 1 */

LL_DMA_ConfigAddresses(DMA1,LL_DMA_CHANNEL_1,LL_ADC_DMA_GetRegAddr(ADC1, LL_ADC_DMA_REG_REGULAR_DATA),

(uint32_t)Veriables_Analog.AdcVal.mcBusVoltage,LL_DMA_DIRECTION_PERIPH_TO_MEMORY);

LL_DMA_SetDataLength(DMA1,LL_DMA_CHANNEL_1,3);

  /* Enable DMA transfer interruption: transfer complete */

  LL_DMA_EnableIT_TC(DMA1,LL_DMA_CHANNEL_1);

  /* Enable DMA transfer interruption: half transfer */

//  LL_DMA_EnableIT_HT(DMA1,LL_DMA_CHANNEL_1);

  /* Enable DMA transfer interruption: transfer error */

  LL_DMA_EnableIT_TE(DMA1,LL_DMA_CHANNEL_1);

LL_DMA_EnableChannel(DMA1,LL_DMA_CHANNEL_1);

  /* USER CODE END ADC1_Init 1 */

  /** Common config

  */

  ADC_InitStruct.Resolution = LL_ADC_RESOLUTION_12B;

  ADC_InitStruct.DataAlignment = LL_ADC_DATA_ALIGN_RIGHT;

  ADC_InitStruct.LowPowerMode = LL_ADC_LP_MODE_NONE;

  LL_ADC_Init(ADC1, &ADC_InitStruct);

  ADC_REG_InitStruct.TriggerSource = LL_ADC_REG_TRIG_SOFTWARE;

  ADC_REG_InitStruct.SequencerLength = LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS;

  ADC_REG_InitStruct.SequencerDiscont = LL_ADC_REG_SEQ_DISCONT_DISABLE;

  ADC_REG_InitStruct.ContinuousMode = LL_ADC_REG_CONV_CONTINUOUS;

  ADC_REG_InitStruct.DMATransfer = LL_ADC_REG_DMA_TRANSFER_UNLIMITED;

  ADC_REG_InitStruct.Overrun = LL_ADC_REG_OVR_DATA_PRESERVED;

  LL_ADC_REG_Init(ADC1, &ADC_REG_InitStruct);

  LL_ADC_SetGainCompensation(ADC1, 0);

  LL_ADC_SetOverSamplingScope(ADC1, LL_ADC_OVS_DISABLE);

  ADC_CommonInitStruct.CommonClock = LL_ADC_CLOCK_SYNC_PCLK_DIV4;

  ADC_CommonInitStruct.Multimode = LL_ADC_MULTI_INDEPENDENT;

  LL_ADC_CommonInit(__LL_ADC_COMMON_INSTANCE(ADC1), &ADC_CommonInitStruct);

LL_ADC_SetCommonClock(ADC12_COMMON,LL_ADC_CLOCK_SYNC_PCLK_DIV4);

while(LL_ADC_GetCommonClock(ADC12_COMMON) != LL_ADC_CLOCK_SYNC_PCLK_DIV4){}

//Errors_Handler();

//  ADC_INJ_InitStruct.TriggerSource = LL_ADC_INJ_TRIG_EXT_TIM1_CH4;

//  ADC_INJ_InitStruct.SequencerLength = LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS;

//  ADC_INJ_InitStruct.SequencerDiscont = LL_ADC_INJ_SEQ_DISCONT_DISABLE;

//  ADC_INJ_InitStruct.TrigAuto = LL_ADC_INJ_TRIG_INDEPENDENT;

//  LL_ADC_INJ_Init(ADC1, &ADC_INJ_InitStruct);

//  LL_ADC_INJ_SetQueueMode(ADC1, LL_ADC_INJ_QUEUE_DISABLE);

//  LL_ADC_INJ_SetTriggerEdge(ADC1, LL_ADC_INJ_TRIG_EXT_RISING);

  /* Disable ADC deep power down (enabled by default after reset state) */

  LL_ADC_DisableDeepPowerDown(ADC1);

  /* Enable ADC internal voltage regulator */

  LL_ADC_EnableInternalRegulator(ADC1);

  /* Delay for ADC internal voltage regulator stabilization. */

  /* Compute number of CPU cycles to wait for, from delay in us. */

  /* Note: Variable divided by 2 to compensate partially */

  /* CPU processing cycles (depends on compilation optimization). */

  /* Note: If system core clock frequency is below 200kHz, wait time */

  /* is only a few CPU processing cycles. */

  uint32_t wait_loop_index;

  wait_loop_index = ((LL_ADC_DELAY_INTERNAL_REGUL_STAB_US * (SystemCoreClock / (100000 * 2))) / 10);

  while(wait_loop_index != 0)

  {

    wait_loop_index--;

  }

  /** Configure Injected Channel

  */

//  LL_ADC_INJ_SetSequencerRanks(ADC1, LL_ADC_INJ_RANK_1, LL_ADC_CHANNEL_3);

//  LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_3, LL_ADC_SAMPLINGTIME_12CYCLES_5);

//  LL_ADC_SetChannelSingleDiff(ADC1, LL_ADC_CHANNEL_3, LL_ADC_SINGLE_ENDED);

//  /** Configure Injected Channel

//  */

//  LL_ADC_INJ_SetSequencerRanks(ADC1, LL_ADC_INJ_RANK_2, LL_ADC_CHANNEL_12);

//  LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_12, LL_ADC_SAMPLINGTIME_12CYCLES_5);

//  LL_ADC_SetChannelSingleDiff(ADC1, LL_ADC_CHANNEL_12, LL_ADC_SINGLE_ENDED);

  /** Configure Regular Channel

  */

  LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_1, LL_ADC_CHANNEL_1);

  LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_1, LL_ADC_SAMPLINGTIME_640CYCLES_5);

  LL_ADC_SetChannelSingleDiff(ADC1, LL_ADC_CHANNEL_1, LL_ADC_SINGLE_ENDED);

  /** Configure Regular Channel

  */

  LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_2, LL_ADC_CHANNEL_TEMPSENSOR_ADC1);

  LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_TEMPSENSOR_ADC1, LL_ADC_SAMPLINGTIME_640CYCLES_5);

  LL_ADC_SetChannelSingleDiff(ADC1, LL_ADC_CHANNEL_TEMPSENSOR_ADC1, LL_ADC_SINGLE_ENDED);

LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(ADC1), LL_ADC_PATH_INTERNAL_VREFINT|LL_ADC_PATH_INTERNAL_TEMPSENSOR);

  /** Configure Regular Channel

  */

  LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_3, LL_ADC_CHANNEL_VREFINT);

  LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_VREFINT, LL_ADC_SAMPLINGTIME_640CYCLES_5);

  LL_ADC_SetChannelSingleDiff(ADC1, LL_ADC_CHANNEL_VREFINT, LL_ADC_SINGLE_ENDED);

  /* USER CODE BEGIN ADC1_Init 2 */

/* Enable interruption ADC group regular end of unitary conversion */

  LL_ADC_EnableIT_EOS(ADC1);

while(LL_ADC_IsEnabledIT_EOS(ADC1) == 0){}

LL_ADC_EnableIT_EOC(ADC1);

//LL_ADC_DisableIT_EOC(ADC1);

while(LL_ADC_IsEnabledIT_EOC(ADC1) == 0){} /* == 0 if Enabled*/

LL_ADC_DisableIT_EOSMP(ADC1);

  /* Enable interruption ADC group end of injected conversion */

  LL_ADC_EnableIT_JEOC(ADC1);

while(LL_ADC_IsEnabledIT_JEOC(ADC1) == 0){}

  LL_ADC_DisableIT_JEOS(ADC1);

while(LL_ADC_IsEnabledIT_JEOS(ADC1) != 0){}

  LL_ADC_StartCalibration(ADC1, LL_ADC_SINGLE_ENDED);

wait_loop_index = (ADC_DELAY_CALIB_ENABLE_CPU_CYCLES >> 1);

while(wait_loop_index != 0)

{

wait_loop_index--;

}

  /* USER CODE END ADC1_Init 2 */

}

/* ADC2 init function */

void MX_ADC2_Init(void)

{

  /* USER CODE BEGIN ADC2_Init 0 */

  /* USER CODE END ADC2_Init 0 */

  LL_ADC_InitTypeDef ADC_InitStruct = {0};

  LL_ADC_REG_InitTypeDef ADC_REG_InitStruct = {0};

  LL_ADC_INJ_InitTypeDef ADC_INJ_InitStruct = {0};

  LL_GPIO_InitTypeDef GPIO_InitStruct = {0};

  LL_RCC_SetADCClockSource(LL_RCC_ADC12_CLKSOURCE_SYSCLK);

  /* Peripheral clock enable */

  LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_ADC12);

  LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);

  LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC);

  /**ADC2 GPIO Configuration

  PA6   ------> ADC2_IN3

  PC4   ------> ADC2_IN5

  */

  GPIO_InitStruct.Pin = V_CURRENT_Pin;

  GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG;

  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;

  LL_GPIO_Init(V_CURRENT_GPIO_Port, &GPIO_InitStruct);

  GPIO_InitStruct.Pin = TEMP_SENS_1C4_Pin;

  GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG;

  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;

  LL_GPIO_Init(TEMP_SENS_1C4_GPIO_Port, &GPIO_InitStruct);

  /* ADC2 DMA Init */

  /* ADC2 Init */

  LL_DMA_SetPeriphRequest(DMA1, LL_DMA_CHANNEL_2, LL_DMAMUX_REQ_ADC2);

  LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_CHANNEL_2, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);

  LL_DMA_SetChannelPriorityLevel(DMA1, LL_DMA_CHANNEL_2, LL_DMA_PRIORITY_MEDIUM);

  LL_DMA_SetMode(DMA1, LL_DMA_CHANNEL_2, LL_DMA_MODE_CIRCULAR);

  LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_CHANNEL_2, LL_DMA_PERIPH_NOINCREMENT);

  LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_CHANNEL_2, LL_DMA_MEMORY_INCREMENT);

  LL_DMA_SetPeriphSize(DMA1, LL_DMA_CHANNEL_2, LL_DMA_PDATAALIGN_HALFWORD);

  LL_DMA_SetMemorySize(DMA1, LL_DMA_CHANNEL_2, LL_DMA_MDATAALIGN_HALFWORD);

  /* ADC2 interrupt Init */

  NVIC_SetPriority(ADC1_2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));

  NVIC_EnableIRQ(ADC1_2_IRQn);

  /* USER CODE BEGIN ADC2_Init 1 */

LL_DMA_ConfigAddresses(DMA1,LL_DMA_CHANNEL_2,LL_ADC_DMA_GetRegAddr(ADC2, LL_ADC_DMA_REG_REGULAR_DATA),

(uint32_t)Veriables_Analog.AdcVal.mosfetTemp,LL_DMA_DIRECTION_PERIPH_TO_MEMORY);

LL_DMA_SetDataLength(DMA1,LL_DMA_CHANNEL_2,1);

  /* Enable DMA transfer interruption: transfer complete */

  LL_DMA_EnableIT_TC(DMA1,LL_DMA_CHANNEL_2);

  /* Enable DMA transfer interruption: half transfer */

//  LL_DMA_EnableIT_HT(DMA1,LL_DMA_CHANNEL_1);

  /* Enable DMA transfer interruption: transfer error */

  LL_DMA_EnableIT_TE(DMA1,LL_DMA_CHANNEL_2);

LL_DMA_EnableChannel(DMA1,LL_DMA_CHANNEL_2);

  /* USER CODE END ADC2_Init 1 */

  /** Common config

  */

  ADC_InitStruct.Resolution = LL_ADC_RESOLUTION_12B;

  ADC_InitStruct.DataAlignment = LL_ADC_DATA_ALIGN_RIGHT;

  ADC_InitStruct.LowPowerMode = LL_ADC_LP_MODE_NONE;

  LL_ADC_Init(ADC2, &ADC_InitStruct);

  ADC_REG_InitStruct.TriggerSource = LL_ADC_REG_TRIG_SOFTWARE;

  ADC_REG_InitStruct.SequencerLength = LL_ADC_REG_SEQ_SCAN_DISABLE;

  ADC_REG_InitStruct.SequencerDiscont = LL_ADC_REG_SEQ_DISCONT_DISABLE;

  ADC_REG_InitStruct.ContinuousMode = LL_ADC_REG_CONV_CONTINUOUS;

  ADC_REG_InitStruct.DMATransfer = LL_ADC_REG_DMA_TRANSFER_UNLIMITED;

  ADC_REG_InitStruct.Overrun = LL_ADC_REG_OVR_DATA_PRESERVED;

  LL_ADC_REG_Init(ADC2, &ADC_REG_InitStruct);

  LL_ADC_SetGainCompensation(ADC2, 0);

  LL_ADC_SetOverSamplingScope(ADC2, LL_ADC_OVS_DISABLE);

  ADC_INJ_InitStruct.TriggerSource = LL_ADC_INJ_TRIG_EXT_TIM1_CH4;

  ADC_INJ_InitStruct.SequencerLength = LL_ADC_INJ_SEQ_SCAN_DISABLE;

  ADC_INJ_InitStruct.SequencerDiscont = LL_ADC_INJ_SEQ_DISCONT_DISABLE;

  ADC_INJ_InitStruct.TrigAuto = LL_ADC_INJ_TRIG_INDEPENDENT;

  LL_ADC_INJ_Init(ADC2, &ADC_INJ_InitStruct);

  LL_ADC_INJ_SetQueueMode(ADC2, LL_ADC_INJ_QUEUE_DISABLE);

  LL_ADC_INJ_SetTriggerEdge(ADC2, LL_ADC_INJ_TRIG_EXT_RISING);

  /* Disable ADC deep power down (enabled by default after reset state) */

  LL_ADC_DisableDeepPowerDown(ADC2);

  /* Enable ADC internal voltage regulator */

  LL_ADC_EnableInternalRegulator(ADC2);

  /* Delay for ADC internal voltage regulator stabilization. */

  /* Compute number of CPU cycles to wait for, from delay in us. */

  /* Note: Variable divided by 2 to compensate partially */

  /* CPU processing cycles (depends on compilation optimization). */

  /* Note: If system core clock frequency is below 200kHz, wait time */

  /* is only a few CPU processing cycles. */

  uint32_t wait_loop_index;

  wait_loop_index = ((LL_ADC_DELAY_INTERNAL_REGUL_STAB_US * (SystemCoreClock / (100000 * 2))) / 10);

  while(wait_loop_index != 0)

  {

    wait_loop_index--;

  }

  /** Configure Injected Channel

  */

  LL_ADC_INJ_SetSequencerRanks(ADC2, LL_ADC_INJ_RANK_1, LL_ADC_CHANNEL_3);

  LL_ADC_SetChannelSamplingTime(ADC2, LL_ADC_CHANNEL_3, LL_ADC_SAMPLINGTIME_12CYCLES_5);

  LL_ADC_SetChannelSingleDiff(ADC2, LL_ADC_CHANNEL_3, LL_ADC_SINGLE_ENDED);

  /** Configure Regular Channel

  */

  LL_ADC_REG_SetSequencerRanks(ADC2, LL_ADC_REG_RANK_1, LL_ADC_CHANNEL_5);

  LL_ADC_SetChannelSamplingTime(ADC2, LL_ADC_CHANNEL_5, LL_ADC_SAMPLINGTIME_640CYCLES_5);

  LL_ADC_SetChannelSingleDiff(ADC2, LL_ADC_CHANNEL_5, LL_ADC_SINGLE_ENDED);

  /* USER CODE BEGIN ADC2_Init 2 */

  /* Enable interruption ADC group regular end of unitary conversion */

  LL_ADC_EnableIT_EOS(ADC2);

while(LL_ADC_IsEnabledIT_EOS(ADC2) == 0){}

  //LL_ADC_DisableIT_EOC(ADC2);

LL_ADC_EnableIT_EOC(ADC2);

while(LL_ADC_IsEnabledIT_EOC(ADC2) == 0){}

LL_ADC_DisableIT_EOSMP(ADC2);

  /* Enable interruption ADC group end of injected conversion */

  LL_ADC_EnableIT_JEOC(ADC2);

while(LL_ADC_IsEnabledIT_JEOC(ADC2) == 0){}

  LL_ADC_DisableIT_JEOS(ADC2);

while(LL_ADC_IsEnabledIT_JEOS(ADC2) != 0){}

LL_ADC_StartCalibration(ADC2, LL_ADC_SINGLE_ENDED);

/* Delay between ADC end of calibration and ADC enable.                   */

/* Note: Variable divided by 2 to compensate partially                    */

/*       CPU processing cycles (depends on compilation optimization).     */

wait_loop_index = (ADC_DELAY_CALIB_ENABLE_CPU_CYCLES >> 1);

while(wait_loop_index != 0)

{

wait_loop_index--;

}

  /* USER CODE END ADC2_Init 2 */

}

void SystemManager_Start(void)

{

GD_Start();

Analog_Start();

LL_TIM_CC_EnableChannel(TIM1, LL_TIM_CHANNEL_CH1);

  LL_TIM_CC_EnableChannel(TIM1, LL_TIM_CHANNEL_CH1N);

  LL_TIM_CC_EnableChannel(TIM1, LL_TIM_CHANNEL_CH2);

LL_TIM_CC_EnableChannel(TIM1, LL_TIM_CHANNEL_CH2N);

  LL_TIM_CC_EnableChannel(TIM1, LL_TIM_CHANNEL_CH3);

  LL_TIM_CC_EnableChannel(TIM1, LL_TIM_CHANNEL_CH3N);

LL_TIM_CC_EnableChannel(TIM1, LL_TIM_CHANNEL_CH4);

  LL_TIM_EnableAllOutputs(TIM1);

  /* Enable counter */

  LL_TIM_EnableCounter(TIM1);

while(LL_TIM_IsEnabledCounter(TIM1) == 0){}

TIM1->CCR1 = 0;

TIM1->CCR2 = 0;

TIM1->CCR3 = 0;

HAL_Delay(100);

LL_GPIO_SetOutputPin(GD_WAKE_GPIO_Port,GD_WAKE_Pin);

HAL_Delay(10);

}

void Analog_Start(void)

{

LL_ADC_ClearFlag_EOC(ADC1);

LL_ADC_ClearFlag_EOS(ADC1);

LL_ADC_ClearFlag_EOSMP(ADC1);

LL_ADC_ClearFlag_EOC(ADC2);

LL_ADC_ClearFlag_EOS(ADC2);

LL_ADC_ClearFlag_EOSMP(ADC2);

LL_ADC_ClearFlag_ADRDY(ADC1);

LL_ADC_ClearFlag_ADRDY(ADC2);

LL_ADC_Enable(ADC1);

LL_ADC_Enable(ADC2);

while(LL_ADC_IsActiveFlag_ADRDY(ADC1) && LL_ADC_IsActiveFlag_ADRDY(ADC2) !=1){}

while(LL_ADC_IsEnabled(ADC1) && LL_ADC_IsEnabled(ADC2) != 1){}

if((LL_ADC_REG_IsConversionOngoing(ADC1) || LL_ADC_REG_IsConversionOngoing(ADC2)) == 0){

LL_ADC_REG_StartConversion(ADC1);

LL_ADC_REG_StartConversion(ADC2);

}

}

[arge2 · Accepted solution]

Edit 

SOLUTION: ADC has a strange sequencial start routine. If you do not obey its rule, it doesnt start conversion. 

Procedure for Properly Starting ADC:

Enable_Internal_Regular();

Wait();

Start_Calibration();

Wait();

Check_ADC_RDY_and_Enabled_Flags();

Enable_ADC();

Wait();

Start_Conversion();