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STM32H573 VFQFPN68 exposed pad details

benjacam
Associate

Hello,

We are using the STM32H573 in a new project. We have designed a custom board using the 64-pin LQFP package.

The MCU connects to a ethernet PHY using RMII interface.

Our product has to meet strict radiated emissions levels that are 7dB lower that CISPR class B.

In our pre-compliance emissions testing, the product passed class B limits, but had emissions above the lower limit. The design is using standard best-practices for EMC compliance (e.g. solid power/ground places, good decoupling, controlled impedance board stack etc etc). Here are the results, red limit line is class B, black is the lower limit we have to pass.

benjacam_0-1739447131133.png

Are some investigation, we found the emissions we all harmonics of the 50MHz RMII clock. e.g. at 400MHz, 950MHz, 1GHz.

Are further investigation we believe the issues is caused by ground bounce in the QFP package. The 50MHz RMII clock is causing the STM32 die to bounce at 50MHz and all its harmonics due to the lead inductance of the package. This causes all the other output pins to contain this harmonic content with respect to the board ground, and then radiate.

We want to switch to a package with lower lead inductance and a lower impedance connection to board ground. The obvious choice is the VFQFPN68 package which has a large exposed pad.

Cutting a long story short, here is the question:

The datasheet does not specify:

  1. how should the exposed pad be connected to the PCB?
  2. how is the ground pad connected within the package?

I hope the answers are as follows, but please let me know!

  1. Connect to PCB ground
  2. Has a low impedance connection to the STM32 die ground.

Many thanks for your help,

Ben

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