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Power Rail Sequencing for STM32H745 When Driving Vcore Externally

rjserpe
Visitor

I'm designing a power supply for an STM32H745. I have a 28V source and was planning to implement two buck converters

  • the first regulates from 28V to 3.3V and supplies the Vdd rail
  • the second regulates from 3.3V to 1.15V and supplies the Vcore rail

rjserpe_1-1753811680856.png

However, this seems to violate the power rail sequencing requirements of the STM32H745. I'm having a little trouble deriving the exact requirements from the datasheet and "Getting Started Guide" (AN4938), but the following excerpt makes me think that if I'm bypassing the internal LDO and driving Vcore externally, the Vcore rail must come up before the Vdd rail: 

rjserpe_2-1753811879197.png

My questions are 
1. Is it true that if I'm driving Vcore externally and bypassing the internal LDO, that the Vcore rail must come up before the Vdd rail?

2. In this case, would my best solution be to just hold the device in reset until the 1V15 rail comes into regulation, perhaps with a comparator driving a FET that pulls down on the RST pin?

 

I'm also open to just implementing the internal Step-Down Converter functionality in the chip if that's a simpler overall solution. I'm implementing the external buck primarily because I want to push the thermal capability of the MCU very high and didn't want to be limited by the internal LDO.

 

Thank you!

 

 

 

 

1 REPLY 1
Chris21
Senior III

Isn't the minimum VDDLDO 1.62 volts?