Impedance and length matching for STM32H7R7L8H6H

[Kaushik1]

I am developing the board using STM32H7R7L8H6H. So in our design we uses multiple interfaces like TFT LCD RGB888, Ethernet(RMII), RS485, Wi-Fi-BLE module, External Flash and PSRAM.

So for better signal integrity, can you please provide impedance and length matching guidelines, specially for TFT LCD, Ethernet(RMII), External FLASH and PSRAM.

[KDJEM.1]

Hello @Kaushik1;

For XSPI and FMC interfaces signal layout guidelines to connect external memories, I recommend you to look at AN5935 section "Recommended PCB routing guidelines for STM32H7Rx/7Sx microcontrollers" 

I think this application note and the STM32H7S78-DK schematic board can help you.

You need to run a signal integrity simulation on the PCB using ibis models of the STM32H7R7L8H6H.

Some guidelines on how to use external peripherals to perform board-level simulations with the signal integrity software is described in "High-speed SI simulations using IBIS and board-level simulations using HyperLynx® SI on STM32 MCUs and MPUs" application note.

Thank you.

Kaouthar

[LCE]

Just curious: what are the highest clock / signal rates on the PCB ?

I'd say that general rules apply here for PCB layout, so all depending on the maximum frequencies and what impedance the interfaces expect.