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Hi, I am using the STM32L4R9-Eval board and want to use OCTOSPI flash. Looking at ST's nor flash example for this eval board, it uses OCTOSPI2 interface, but FLASH is connected to OCTPSPI1 interface as per its schematic.

Ashvin Ramani
Associate III

0693W00000UFW5mQAH.pngCan anyone please let me know, how is this possible?

1 ACCEPTED SOLUTION

Accepted Solutions

Yes, I think they cross connect the P1 pin sets to OCTOSPI2 via the OSPIM (Mux)

This does seem unnecessarily confusing and convoluted.

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6 REPLIES 6

U12 is the FLASH

OCTOSPI2​

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Ashvin Ramani
Associate III

@Community member​ ,Thanks for your answer.

But by mistake, I have attached the wrong snapshot, corrected it now, and also attaching here:

0693W00000UFW1QQAX.pngAs per my understanding, U5 is RAM connected to OCTOSPI2 and U6 is FLASH connected to OCTOSPI1 but in the NOR flash example, they are using OCTOSPI2.

Looks like incorrect example, please confirm.

Hello,

well, that looks like a mistake...

Check the BSP drivers for that eval board, it is using OSPI1...

(ticket 135802)

@Mike_ST​ 

STM32Cube_FW_L4_V1.16.0\Drivers\BSP\STM32L4R9I_EVAL\stm32l4r9i_eval_ospi_nor.c

References OCTOSPI1

STM32Cube_FW_L4_V1.16.0\Projects\STM32L4R9I-EVAL\Examples\OSPI\OSPI_NOR_MemoryMapped\Inc\main.h

References OCTOSPI2 for NOR

/* Definition for OSPI clock resources */

#define OSPI_CLK_ENABLE()      __HAL_RCC_OSPI2_CLK_ENABLE()

#define OSPI_CLK_DISABLE()     __HAL_RCC_OSPI2_CLK_DISABLE()

...

#define OSPI_FORCE_RESET()     __HAL_RCC_OSPI2_FORCE_RESET()

#define OSPI_RELEASE_RESET()    __HAL_RCC_OSPI2_RELEASE_RESET()

Now it does map/mux via OSPIM to PORT-1, but this is so unnecessary and confusing for users..

 /*##-4- Configure the OctoSPI IO Manager ####################################*/

 OSPIM_Cfg_Struct.ClkPort  = 1;

 OSPIM_Cfg_Struct.DQSPort  = 1;

 OSPIM_Cfg_Struct.IOHighPort = HAL_OSPIM_IOPORT_1_HIGH;

 OSPIM_Cfg_Struct.IOLowPort = HAL_OSPIM_IOPORT_1_LOW;

 OSPIM_Cfg_Struct.NCSPort  = 1;

Tips, Buy me a coffee, or three.. PayPal Venmo
Up vote any posts that you find helpful, it shows what's working..

Yes, I think they cross connect the P1 pin sets to OCTOSPI2 via the OSPIM (Mux)

This does seem unnecessarily confusing and convoluted.

Tips, Buy me a coffee, or three.. PayPal Venmo
Up vote any posts that you find helpful, it shows what's working..

@Community member​ 

Thank you, I completly forgot about the OSPIM on the L4+. :downcast_face_with_sweat: