parallel synchronous slave interface (PSSI) Host-to-Host app-note or example.

[Michael Schmid]

Dear all,

ST brought a new feature to the STM32H7A/B and some L4+ MCUs, the "parallel synchronous slave interface (PSSI)". We would like to use this for a fast host-to-host communication. But this interface seem so new, we could only find register description in the RM0432 Reference manual. Are there any code example or app-notes for PSSI host-to-host communication?

Thanks.

[Michael Schmid]

To answer my own question: I have found a great example under

https://github.com/STMicroelectronics/STM32CubeH7/tree/master/Projects/NUCLEO-H7A3ZI-Q/Examples/PSSI/PSSI_Transmit_Receive_DMA

The only question open now for me: In the above example, only 8 bit data width is used. What changes would be required to use a 16 bit wide bus? Is there a reason, why only 8 bit, out of the available 16 bit, was used?

[Amel NASRI · Accepted solution]

Hi @Michael Schmid​ ,

To answer your question: I assume this was just the example choice as PSSI can be configured in both 8-bit or 16-bit parallel data input or output.

Then, it may also be related to hardware constraint: we don't have all required pins available in both boards for 16-bit mode.

For my curiosity: could you please explain how will you be using this interface as a host-to-host while PSSI is operating in slave mode? Which device will be connected in your case? For the example, we used 2 NUCLEO-H7A3ZI-Q.

-Amel

[Michael Schmid]

Dear Amel,

To answer your question: when I was writing host-to-host, I was thinking about the function of the chip, not the interface mode. Of course, there will be a master and slaves, as in the example with the 2 NUCLEO-H7A3ZI-Q boards.

About the pin constraint: When I use STM32cubeMX, select the NUCLEO-H7A3ZI-Q board, initialize the default periphery, I can select PSSI with 16 bit wide bus. Could you tell me, what pins are missing for a 16 bit wide implementation?

Thanks.

[Amel NASRI]

About the pin constraint: When I use STM32cubeMX, select the NUCLEO-H7A3ZI-Q board, initialize the default periphery, I can select PSSI with 16 bit wide bus. Could you tell me, what pins are missing for a 16 bit wide implementation?

==> it is just an assumption, as I didn't reviewed deeply the example.

[LGonz.1]

Dear community,

do you have the example working as you expected? Recently I try it but the master stuck as no one package were received. With polling and generating pulses with a gpio I accomplish to receive data but it required to have two adittional clocks before DE get low and one or two pulses after. Another observation is that after transmitting a package the clock polarity change from FALLING to RISING. is the any errata?