2025-07-25 12:10 PM - last edited on 2025-07-25 1:14 PM by Peter BENSCH
I need to calculate and estimate the required thermal resistance and temperature in operation for thermal design. When I read in Section 3.1 of datasheet, I do not see the Rja I can use directly, instead, it presents a chipset configuration with various Rja parameters. What does the chipset configuration stands for, is this configuration for 3 VNH5019A-E chips or 3 partitions in one VNH5019A-E? and how to understand Table 17 (thermal calculation in clockwise and anti-clockwise operation)?
Thanks!
Solved! Go to Solution.
2025-07-25 9:16 PM
Welcome @MylesP, to the community!
The VNH5019A-E is a full bridge motor driver, in which the high-side driver MOSFETs (HSD, chip 1) are located on one of three leadframe parts and each low-side driver (LSD, chip 2 and 3) MOSFET on each of the other parts (fig. 17). Depending on the switching scheme, the time behaviour of the PWM and the respective power dissipation, the respective Rth become effective, which is shown in table 17, whereby the direction of rotation is irrelevant (the reference to clockwise and anti-clockwise applies equally to both directions). The diagram in fig. 18 shows the Rth of the individual chips, which depend on the copper area and are contained together in the VNH5019A-E.
Does it answer your questions?
Regards
/Peter
2025-07-25 9:16 PM
Welcome @MylesP, to the community!
The VNH5019A-E is a full bridge motor driver, in which the high-side driver MOSFETs (HSD, chip 1) are located on one of three leadframe parts and each low-side driver (LSD, chip 2 and 3) MOSFET on each of the other parts (fig. 17). Depending on the switching scheme, the time behaviour of the PWM and the respective power dissipation, the respective Rth become effective, which is shown in table 17, whereby the direction of rotation is irrelevant (the reference to clockwise and anti-clockwise applies equally to both directions). The diagram in fig. 18 shows the Rth of the individual chips, which depend on the copper area and are contained together in the VNH5019A-E.
Does it answer your questions?
Regards
/Peter
2025-07-28 10:28 AM
Hi Peter,
Appreciate your answer. It addresses my major question for the chip partition of VNH5019A-E.
Here is further question to follow up - in table 17, when Chip1 is on(High side is on), chip2/chip3 is off(low side is off), Power in chip1 is only heat dissipation source, but the thermal dissipation can flow in different paths, chip1 to the ambient, chip2 to ambient and chip3 to the ambient. However, in the thermal calculation of table 17, it looks like it assumes the thermal flows in any one path for each chip's Tj calculation. Will the result is much higher than the actual junction temperature?
And here is one more thing to clarify - Chip 1 is ON does mean either of high-side MOSFETs is ON instead of both are ON, correct?